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vc/amd/fsp/picasso: Sync UPD and GUID files 

Update to the latest auto-generated UPD files.  Add the GUID for the
BERT HOB now being reported.

Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: Ia01f626bc85696483173b567bb4f06d308832a91
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42529
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Marshall Dawson 2020-06-18 10:49:36 -06:00 committed by Patrick Georgi
parent 3f7a52f00e
commit 90cd4aaccb
3 changed files with 10 additions and 2 deletions
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4
src/vendorcode/amd/fsp/picasso/FspGuids.h
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@ -9,6 +9,10 @@
GUID_INIT(0x5fc7897a, 0x5aff, 0x4c61, \ GUID_INIT(0x5fc7897a, 0x5aff, 0x4c61, \
0xaa, 0x7a, 0xdd, 0xcf, 0xa9, 0x18, 0x43, 0x0c) 0xaa, 0x7a, 0xdd, 0xcf, 0xa9, 0x18, 0x43, 0x0c)
#define AMD_FSP_BERT_HOB_GUID \
GUID_INIT(0xa21f7ab5, 0x6a89, 0x4df2, \
0xb9, 0x19, 0x51, 0xad, 0x95, 0x50, 0x5b, 0xd8)
#define AMD_FSP_ACPI_SSDT_HOB_GUID \ #define AMD_FSP_ACPI_SSDT_HOB_GUID \
GUID_INIT(0x54445353, 0x4002, 0x403b, \ GUID_INIT(0x54445353, 0x4002, 0x403b, \
0x87, 0xE1, 0x3F, 0xEB, 0x13, 0xC5, 0x66, 0x9A) 0x87, 0xE1, 0x3F, 0xEB, 0x13, 0xC5, 0x66, 0x9A)

5
src/vendorcode/amd/fsp/picasso/FspmUpd.h
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@ -61,7 +61,10 @@ typedef struct {
/** Offset 0x00C8**/ uint32_t tseg_size; /** Offset 0x00C8**/ uint32_t tseg_size;
/** Offset 0x00CC**/ uint8_t pspp_policy; /** Offset 0x00CC**/ uint8_t pspp_policy;
/** Offset 0x00CD**/ uint8_t audio_soundwire; /** Offset 0x00CD**/ uint8_t audio_soundwire;
/** Offset 0x00CE**/ uint8_t UnusedUpdSpace0[50]; /** Offset 0x00CE**/ uint8_t unused8;
/** Offset 0x00CF**/ uint8_t unused9;
/** Offset 0x00D0**/ uint32_t bert_size;
/** Offset 0x00D4**/ uint8_t UnusedUpdSpace0[44];
/** Offset 0x0100**/ uint16_t Reserved100; /** Offset 0x0100**/ uint16_t Reserved100;
/** Offset 0x0102**/ uint16_t UpdTerminator; /** Offset 0x0102**/ uint16_t UpdTerminator;
} FSP_M_CONFIG; } FSP_M_CONFIG;

3
src/vendorcode/amd/fsp/picasso/FspsUpd.h
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@ -44,7 +44,8 @@ typedef struct {
/** Offset 0x00EC**/ uint8_t fch_usb_early_debug_select_enable; /** Offset 0x00EC**/ uint8_t fch_usb_early_debug_select_enable;
/** Offset 0x00ED**/ uint8_t unused8; /** Offset 0x00ED**/ uint8_t unused8;
/** Offset 0x00EE**/ uint32_t xhci_oc_pin_select; /** Offset 0x00EE**/ uint32_t xhci_oc_pin_select;
/** Offset 0x00F2**/ uint8_t UnusedUpdSpace0[46]; /** Offset 0x00F2**/ uint8_t xhci0_force_gen1;
/** Offset 0x00F3**/ uint8_t UnusedUpdSpace0[45];
/** Offset 0x0120**/ uint16_t UpdTerminator; /** Offset 0x0120**/ uint16_t UpdTerminator;
} FSP_S_CONFIG; } FSP_S_CONFIG;