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cpu/amd/msr: Clarify MMIO_CONF shift value 

MMIO_BUS_RANGE_SHIFT is a numerical value and not a bit field.
Change it to simply 2.  Otherwise its usage winds up evaluating
to BusRange << (1 << 1).

Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I2a6ecfc9fbfd45f69194b8daef43ff84a1dfd5fc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33942
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
This commit is contained in:
Marshall Dawson 2019-07-01 09:56:12 -05:00
parent bf2c693f89
commit 914e6b44bb
1 changed files with 1 additions and 1 deletions
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2
src/include/cpu/amd/msr.h
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@ -39,7 +39,7 @@
#define MSR_INTPEND 0xC0010055 #define MSR_INTPEND 0xC0010055
#define MMIO_CONF_BASE 0xC0010058 #define MMIO_CONF_BASE 0xC0010058
#define MMIO_RANGE_EN (1 << 0) #define MMIO_RANGE_EN (1 << 0)
#define MMIO_BUS_RANGE_SHIFT (1 << 1) #define MMIO_BUS_RANGE_SHIFT 2
/* P-state Current Limit Register */ /* P-state Current Limit Register */
#define PS_LIM_REG 0xC0010061 #define PS_LIM_REG 0xC0010061
/* P-state Maximum Value shift position */ /* P-state Maximum Value shift position */