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soc/intel/apollolake: Add option to disable xHCI Link Compliance Mode 

Provide options to disable xHCI Link Compliance Mode. Default is FALSE
to not disable Compliance Mode. Set TRUE to disable Compliance Mode.

BRANCH=octopus
BUG=b:115699781
TEST=Verified booting to kernel.

Change-Id: I2a486bc4c1a8578cfd7ac3d17103e889eaa25fe4
Signed-off-by: John Zhao <john.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/c/30816
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
John Zhao 2019-01-10 12:13:38 -08:00 committed by Patrick Georgi
parent e49b2f088f
commit 91600a3182
2 changed files with 12 additions and 1 deletions
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5
src/soc/intel/apollolake/chip.c
View File

@ -573,6 +573,11 @@ static void glk_fsp_silicon_init_params_cb(
* PMIC PCH_PWROK delay. * PMIC PCH_PWROK delay.
*/ */
silconfig->PmicPmcIpcCtrl = cfg->PmicPmcIpcCtrl; silconfig->PmicPmcIpcCtrl = cfg->PmicPmcIpcCtrl;
/*
* Options to disable XHCI Link Compliance Mode.
*/
silconfig->DisableComplianceMode = cfg->DisableComplianceMode;
#endif #endif
} }

6
src/soc/intel/apollolake/chip.h
View File

@ -162,6 +162,12 @@ struct soc_intel_apollolake_config {
* (31:24) + Register_Offset (23:16) + OR Value (15:8) + AND Value (7:0) * (31:24) + Register_Offset (23:16) + OR Value (15:8) + AND Value (7:0)
*/ */
uint32_t PmicPmcIpcCtrl; uint32_t PmicPmcIpcCtrl;
/* Options to disable XHCI Link Compliance Mode. Default is FALSE to not
* disable Compliance Mode. Set TRUE to disable Compliance Mode.
* 0:FALSE(Default), 1:True.
*/
uint8_t DisableComplianceMode;
}; };
typedef struct soc_intel_apollolake_config config_t; typedef struct soc_intel_apollolake_config config_t;