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cpu/x86/lapic/secondary.S: Adapt for x86_64 

Adapt the old lapic init code for x86_64.

Change-Id: I5128ed574323025e927137870fb10b23d06bc01d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48221
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Arthur Heymans 2020-12-01 23:26:45 +01:00
parent d79e48570c
commit 91d5a6cc47
1 changed files with 13 additions and 0 deletions
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13
src/cpu/x86/lapic/secondary.S
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@ -33,7 +33,11 @@ _secondary_start:
_secondary_gdt_addr: _secondary_gdt_addr:
gdtaddr: gdtaddr:
.word 0 /* the table limit */ .word 0 /* the table limit */
#if ENV_X86_64
.quad 0
#else
.long 0 /* we know the offset */ .long 0 /* we know the offset */
#endif
_secondary_start_end: _secondary_start_end:
@ -54,14 +58,23 @@ __ap_protected_start:
/* Load the Interrupt descriptor table */ /* Load the Interrupt descriptor table */
lidt idtarg lidt idtarg
#if ENV_X86_64
/* entry64.inc preserves ebx. */
#include <cpu/x86/64bit/entry64.inc>
mov secondary_stack, %rsp
andl $0xfffffff0, %esp
mov secondary_cpu_index, %rdi
#else
/* Set the stack pointer, and flag that we are done */ /* Set the stack pointer, and flag that we are done */
xorl %eax, %eax xorl %eax, %eax
movl secondary_stack, %esp movl secondary_stack, %esp
andl $0xfffffff0, %esp andl $0xfffffff0, %esp
sub $12, %esp /* maintain 16-byte alignment for the call below */ sub $12, %esp /* maintain 16-byte alignment for the call below */
movl secondary_cpu_index, %edi movl secondary_cpu_index, %edi
pushl %edi pushl %edi
movl %eax, secondary_stack movl %eax, secondary_stack
#endif
call secondary_cpu_init call secondary_cpu_init
1: hlt 1: hlt