mb/ocp/deltalake: Update SMBIOS type 4 -- Processor Information
TEST=Execute "dmidecode -t 4" to check if the processor information is correct for Deltalake platform Change-Id: I5d075bb297f2e71a2545ab6ad82304a825ed7d19 Signed-off-by: Morgan Jang <Morgan_Jang@wiwynn.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43789 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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@ -449,10 +449,27 @@ static int get_socket_type(void)
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return 0x13;
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if (CONFIG(CPU_INTEL_SOCKET_LGA775))
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return 0x15;
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if (CONFIG(XEON_SP_COMMON_BASE))
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return 0x36;
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return 0x02; /* Unknown */
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}
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unsigned int __weak smbios_processor_external_clock(void)
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{
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return 0; /* Unknown */
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}
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unsigned int __weak smbios_processor_characteristics(void)
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{
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return 0;
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}
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unsigned int __weak smbios_processor_family(struct cpuid_result res)
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{
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return (res.eax > 0) ? 0x0c : 0x6;
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}
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static int smbios_write_type1(unsigned long *current, int handle)
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{
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struct smbios_type1 *t = (struct smbios_type1 *)*current;
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@ -528,6 +545,7 @@ static int smbios_write_type4(unsigned long *current, int handle)
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struct cpuid_result res;
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struct smbios_type4 *t = (struct smbios_type4 *)*current;
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int len = sizeof(struct smbios_type4);
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uint16_t characteristics = 0;
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/* Provide sane defaults even for CPU without CPUID */
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res.eax = res.edx = 0;
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@ -544,7 +562,7 @@ static int smbios_write_type4(unsigned long *current, int handle)
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t->processor_id[1] = res.edx;
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t->processor_manufacturer = smbios_cpu_vendor(t->eos);
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t->processor_version = smbios_processor_name(t->eos);
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t->processor_family = (res.eax > 0) ? 0x0c : 0x6;
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t->processor_family = smbios_processor_family(res);
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t->processor_type = 3; /* System Processor */
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/*
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* If CPUID leaf 11 is available, calculate "core count" by dividing
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@ -583,10 +601,31 @@ static int smbios_write_type4(unsigned long *current, int handle)
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if (cpu_have_cpuid() && cpuid_get_max_func() >= 0x16) {
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t->max_speed = cpuid_ebx(0x16);
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t->current_speed = cpuid_eax(0x16); /* base frequency */
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t->external_clock = cpuid_ecx(0x16);
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} else {
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t->max_speed = smbios_cpu_get_max_speed_mhz();
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t->current_speed = smbios_cpu_get_current_speed_mhz();
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t->external_clock = smbios_processor_external_clock();
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}
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if (cpu_have_cpuid()) {
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res = cpuid(1);
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if ((res.ecx) & BIT(5))
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characteristics |= BIT(6); /* BIT6: Enhanced Virtualization */
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if ((res.edx) & BIT(28))
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characteristics |= BIT(4); /* BIT4: Hardware Thread */
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if (((cpuid_eax(0x80000000) - 0x80000000) + 1) > 2) {
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res = cpuid(0x80000001);
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if ((res.edx) & BIT(20))
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characteristics |= BIT(5); /* BIT5: Execute Protection */
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}
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}
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t->processor_characteristics = characteristics | smbios_processor_characteristics();
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*current += len;
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return len;
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}
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@ -54,6 +54,11 @@ const char *smbios_chassis_version(void);
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const char *smbios_chassis_serial_number(void);
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const char *smbios_processor_serial_number(void);
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unsigned int smbios_processor_external_clock(void);
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unsigned int smbios_processor_characteristics(void);
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struct cpuid_result;
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unsigned int smbios_processor_family(struct cpuid_result res);
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/* Used by mainboard to add port information of type 8 */
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struct port_information;
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int smbios_write_type8(unsigned long *current, int *handle,
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@ -211,6 +211,16 @@ static int mainboard_smbios_data(struct device *dev, int *handle, unsigned long
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}
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#endif
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unsigned int smbios_processor_family(struct cpuid_result res)
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{
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return 0xb3; /* Xeon */
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}
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unsigned int smbios_processor_characteristics(void)
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{
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/* 64-bit Capable, Multi-Core, Power/Performance Control */
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return 0x8c; /* BIT2 + BIT3 + BIT7 */
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}
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static void mainboard_enable(struct device *dev)
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{
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