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soc/intel/alderlake/romstage: Drop ineffective FSP-M UPD `ChHashMask` 

FSP-M UPD ChHashOverride is default disable hence ChHashMask doesn't
take any effect. Dropping ChHashMask assignment in coreboot.

TEST=Able to build and boot ADL-P LP4 RVP. FSP-M UPD dump showed both
UPDs are set to default value 0.
ChHashOverride: 0
ChHashMask: 0h

Change-Id: Ide1c9da27ca68fd36ff5b44910cfcedfcb12f232
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55272
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2021-06-07 20:04:55 +05:30
parent f7dbf4afd6
commit 930b643f8f
1 changed files with 0 additions and 2 deletions
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2
src/soc/intel/alderlake/romstage/fsp_params.c
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@ -128,8 +128,6 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
m_cfg->HyperThreading = 1; m_cfg->HyperThreading = 1;
/* Disable Lock PCU Thermal Management registers */ /* Disable Lock PCU Thermal Management registers */
m_cfg->LockPTMregs = 0; m_cfg->LockPTMregs = 0;
/* Channel Hash Mask:0x0001=BIT6 set(Minimal), 0x3FFF=BIT[19:6] set(Maximum) */
m_cfg->ChHashMask = 0x30CC;
/* Enable SMBus controller */ /* Enable SMBus controller */
dev = pcidev_path_on_root(PCH_DEVFN_SMBUS); dev = pcidev_path_on_root(PCH_DEVFN_SMBUS);
m_cfg->SmbusEnable = is_dev_enabled(dev); m_cfg->SmbusEnable = is_dev_enabled(dev);