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mb/intel/sm: Skip FSP to program UART0 

Set "SerialIoUartMode" for UART0 as PchSerialIoSkipInit

Change-Id: Idc7da7bf38634c04b0f4acd4c7c2ea9fa88545e5
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55207
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2021-06-04 14:09:13 +05:30
parent 194f0eb59c
commit 93632a9f1f
1 changed files with 1 additions and 1 deletions
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src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
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@ -103,7 +103,7 @@ chip soc/intel/alderlake
}" }"
register "SerialIoUartMode" = "{ register "SerialIoUartMode" = "{
[PchSerialIoIndexUART0] = PchSerialIoPci, [PchSerialIoIndexUART0] = PchSerialIoSkipInit,
[PchSerialIoIndexUART1] = PchSerialIoDisabled, [PchSerialIoIndexUART1] = PchSerialIoDisabled,
[PchSerialIoIndexUART2] = PchSerialIoDisabled, [PchSerialIoIndexUART2] = PchSerialIoDisabled,
}" }"