mainboard/intel/galileo: Add Intel Galileo Gen 2 Support

Add the files to build soc/intel/quark and mainboard/intel/galileo for a
minimal coreboot image.  Please note that this configuration does not
run.  Include HTML documentation for the Galileo Gen 2 board.

Testing is successful if build completes successfully.

TEST=Build for Galileo

Change-Id: Idd3fda1b8ed9460fa8c92e6dcaa601c3c9f63a36
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13507
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Lee Leahy 2016-01-26 10:06:42 -08:00 committed by Martin Roth
parent 4af905ac95
commit 93dd5f78ff
5 changed files with 117 additions and 0 deletions

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##
## This file is part of the coreboot project.
##
## Copyright (C) 2015-2016 Intel Corp.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
if BOARD_INTEL_GALILEO
config BOARD_SPECIFIC_OPTIONS
def_bool y
select BOARD_ROMSIZE_KB_8192
select PLATFORM_USES_FSP1_1
select SOC_INTEL_QUARK
config MAINBOARD_DIR
string
default intel/galileo
config MAINBOARD_PART_NUMBER
string
default "Galileo"
config MAINBOARD_VENDOR
string
default "Intel"
endif # BOARD_INTEL_QUARK

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##
## This file is part of the coreboot project.
##
## Copyright (C) 2016 Intel Corp.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
config BOARD_INTEL_GALILEO
bool "Galileo"

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##
## This file is part of the coreboot project.
##
## Copyright (C) 2015-2016 Intel Corp.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp1_1/quark

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##
## This file is part of the coreboot project.
##
## Copyright (C) 2013 Google Inc.
## Copyright (C) 2015-2016 Intel Corp.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
chip soc/intel/quark
device domain 0 on
# EDS Table 3
device pci 00.0 on end # 8086 0958 - Host Bridge
device pci 1f.0 on end # 8086 095e - Legacy Bridge
end
end

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/*
* This file is part of the coreboot project.
*
* Copyright (C) 2013 Google Inc.
* Copyright (C) 2015-2016 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <fsp/romstage.h>
/* All FSP specific code goes in this block */
void mainboard_romstage_entry(struct romstage_params *rp)
{
/* Call back into chipset code with platform values updated. */
romstage_common(rp);
}