soc/intel/apl: Fix programming temporary MTRR on GLK
Programming MTRR happens later in the
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT codepath.
fast_spi_cache_bios_region() assumes an existing MTRR solution from
x86_setup_mtrrs_with_detect().
This fixes a problem introduced by 829e8e6
"soc/intel: Use common
codeflow for MP init".
Change-Id: I9b6130cf76317440ebe7a7a53e460e2b658d198e
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73836
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
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@ -268,6 +268,10 @@ void mp_init_cpus(struct bus *cpu_bus)
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/* TODO: Handle mp_init_with_smm failure? */
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mp_init_with_smm(cpu_bus, &mp_ops);
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/* MTRR setup happens later, so we're done here. */
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if (CONFIG(SOC_INTEL_COMMON_BLOCK_CPU_MPINIT))
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return;
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/* Temporarily cache the memory-mapped boot media. */
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if (CONFIG(BOOT_DEVICE_MEMORY_MAPPED) &&
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CONFIG(BOOT_DEVICE_SPI_FLASH))
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