amd/stoneyridge: Set SCI_MAP for SCI enabled GPIOs
By default we use a 1:1 mapping between GEVENT bits and the corresponding SCI_MAP entry. However, we still must program the SCI_MAP entries with the GEVENT number. BUG=b:109759838 TEST=(1) powerd_dbus_suspend (2) move finger on touchpad for ~1 second => system resumes from S3 Change-Id: Ie7be45264f9bfec56efc47a03071fdb924d16b6a Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/26930 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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2 changed files with 11 additions and 0 deletions
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@ -19,6 +19,7 @@
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#include <console/console.h>
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#include <gpio.h>
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#include <soc/gpio.h>
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#include <soc/southbridge.h>
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#include <assert.h>
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#include <compiler.h>
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@ -97,6 +98,11 @@ static void program_smi(uint32_t flag, int gevent_num)
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SMI_SCI_LVL_LOW);
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}
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static void route_sci(uint8_t event)
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{
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smi_write8(SMI_SCI_MAP(event), event);
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}
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static void get_sci_config_bits(uint32_t flag, uint32_t *edge, uint32_t *level)
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{
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uint32_t trigger;
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@ -232,6 +238,9 @@ void sb_program_gpios(const struct soc_amd_gpio *gpio_list_ptr, size_t size)
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mux_ptr = (uint8_t *)(uintptr_t)(gpio + AMD_GPIO_MUX);
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write8(mux_ptr, mux & AMD_GPIO_MUX_MASK);
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/* special case if pin 2 is assigned to wake */
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if ((gpio == 2) && !(mux & AMD_GPIO_MUX_MASK))
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route_sci(GPIO_2_EVENT);
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gpio_ptr = (uint32_t *)gpio_get_address(gpio);
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if (control_flags & GPIO_SPECIAL_FLAG) {
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@ -267,6 +276,7 @@ void sb_program_gpios(const struct soc_amd_gpio *gpio_list_ptr, size_t size)
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edge_level |= bit_edge << gevent_num;
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direction |= bit_level << gevent_num;
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mask |= (1 << gevent_num);
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route_sci(gevent_num);
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break;
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default:
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printk(BIOS_WARNING, "Error, flags 0x%08x\n",
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@ -368,6 +368,7 @@ enum {
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GEVENT_22,
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GEVENT_23,
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};
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#define GPIO_2_EVENT GEVENT_8
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#define GPIO_OUTPUT_OUT_HIGH (GPIO_OUTPUT_ENABLE | GPIO_OUTPUT_VALUE)
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#define GPIO_OUTPUT_OUT_LOW GPIO_OUTPUT_ENABLE
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