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soc/amd/common/data_fabric: print decoded control register contents 

Since all SoCs define the df_mmio_control union for the bits used in the
code, data_fabric_print_mmio_conf can take advantage of that and also
print a decoded version of those bits.

Output on Mandolin before the patch:

=== Data Fabric MMIO configuration registers ===
idx  control             base            limit
  0       93         fc000000         febfffff
  1       93      10000000000     ffffffffffff
  2       93         d0000000         f7ffffff
  3     1093         fed00000         fedfffff
  4       90                0             ffff
  5       90                0             ffff
  6       90                0             ffff
  7       90                0             ffff

Output on Mandolin with the patch:

=== Data Fabric MMIO configuration registers ===
idx             base            limit  control R W NP F-ID
  0         fc000000         febfffff       93 x x       9
  1      10000000000     ffffffffffff       93 x x       9
  2         d0000000         f7ffffff       93 x x       9
  3         fed00000         fedfffff     1093 x x  x    9
  4                0             ffff       90           9
  5                0             ffff       90           9
  6                0             ffff       90           9
  7                0             ffff       90           9

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I06e1d3a3e9abd664f59f2bb852394e7f723f2b30
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72880
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
This commit is contained in:
Felix Held 2023-02-07 14:31:16 +01:00
parent 5bdedae900
commit 965a45f486
1 changed files with 9 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
src/soc/amd/common/block/data_fabric/data_fabric_helper.c
View File

@ -47,13 +47,13 @@ void data_fabric_write32(uint8_t function, uint16_t reg, uint8_t instance_id, ui
void data_fabric_print_mmio_conf(void) void data_fabric_print_mmio_conf(void)
{ {
uint32_t control; union df_mmio_control control;
uint64_t base, limit; uint64_t base, limit;
printk(BIOS_SPEW, printk(BIOS_SPEW,
"=== Data Fabric MMIO configuration registers ===\n" "=== Data Fabric MMIO configuration registers ===\n"
"idx control base limit\n"); "idx base limit control R W NP F-ID\n");
for (unsigned int i = 0; i < DF_MMIO_REG_SET_COUNT; i++) { for (unsigned int i = 0; i < DF_MMIO_REG_SET_COUNT; i++) {
control = data_fabric_broadcast_read32(0, DF_MMIO_CONTROL(i)); control.raw = data_fabric_broadcast_read32(0, DF_MMIO_CONTROL(i));
/* Base and limit address registers don't contain the lower address bits, but /* Base and limit address registers don't contain the lower address bits, but
are shifted by D18F0_MMIO_SHIFT bits */ are shifted by D18F0_MMIO_SHIFT bits */
base = (uint64_t)data_fabric_broadcast_read32(0, DF_MMIO_BASE(i)) base = (uint64_t)data_fabric_broadcast_read32(0, DF_MMIO_BASE(i))
@ -62,8 +62,12 @@ void data_fabric_print_mmio_conf(void)
<< D18F0_MMIO_SHIFT; << D18F0_MMIO_SHIFT;
/* Lower D18F0_MMIO_SHIFT address limit bits are all 1 */ /* Lower D18F0_MMIO_SHIFT address limit bits are all 1 */
limit += (1 << D18F0_MMIO_SHIFT) - 1; limit += (1 << D18F0_MMIO_SHIFT) - 1;
printk(BIOS_SPEW, " %2u %8x %16llx %16llx\n", printk(BIOS_SPEW, " %2u %16llx %16llx %8x %s %s %s %4x\n",
i, control, base, limit); i, base, limit, control.raw,
control.re ? "x" : " ",
control.we ? "x" : " ",
control.np ? "x" : " ",
control.fabric_id);
} }
} }