arch/x86: Move TSEG_STAGE_CACHE implementation
This is declared weak so that platforms that do not have smm_subregion() can provide their own implementation. Change-Id: Ide815b45cbc21a295b8e58434644e82920e84e31 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34704 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -42,6 +42,10 @@ endif
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ifeq ($(CONFIG_SMM_TSEG),y)
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ifeq ($(CONFIG_SMM_TSEG),y)
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ramstage-y += stage_cache.c
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romstage-y += stage_cache.c
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postcar-y += stage_cache.c
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smmstub-y += smm_stub.S
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smmstub-y += smm_stub.S
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smm-y += smm_module_handler.c
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smm-y += smm_module_handler.c
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@ -1,8 +1,7 @@
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/*
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/*
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* This file is part of the coreboot project.
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* This file is part of the coreboot project.
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*
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*
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* Copyright (C) 2013 Google Inc.
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* Copyright 2013 Google Inc.
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* Copyright (C) 2015 Intel Corp.
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* it under the terms of the GNU General Public License as published by
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@ -17,8 +16,14 @@
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#include <console/console.h>
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#include <console/console.h>
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#include <cpu/x86/smm.h>
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#include <cpu/x86/smm.h>
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#include <stage_cache.h>
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#include <stage_cache.h>
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#include <types.h>
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void stage_cache_external_region(void **base, size_t *size)
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int __weak smm_subregion(int sub, void **base, size_t *size)
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{
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return -1;
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}
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void __weak stage_cache_external_region(void **base, size_t *size)
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{
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{
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if (smm_subregion(SMM_SUBREGION_CACHE, base, size)) {
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if (smm_subregion(SMM_SUBREGION_CACHE, base, size)) {
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printk(BIOS_ERR, "ERROR: No cache SMM subregion.\n");
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printk(BIOS_ERR, "ERROR: No cache SMM subregion.\n");
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@ -29,7 +29,6 @@ romstage-y += fsp_util.c
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romstage-y += hob.c
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romstage-y += hob.c
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romstage-y += raminit.c
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romstage-y += raminit.c
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romstage-y += romstage.c
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romstage-y += romstage.c
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romstage-y += stage_cache.c
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romstage-$(CONFIG_MMA) += mma_core.c
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romstage-$(CONFIG_MMA) += mma_core.c
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ramstage-$(CONFIG_RUN_FSP_GOP) += fsp_gop.c
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ramstage-$(CONFIG_RUN_FSP_GOP) += fsp_gop.c
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@ -37,13 +36,11 @@ ramstage-y += fsp_relocate.c
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ramstage-y += fsp_util.c
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ramstage-y += fsp_util.c
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ramstage-y += hob.c
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ramstage-y += hob.c
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ramstage-y += ramstage.c
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ramstage-y += ramstage.c
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ramstage-y += stage_cache.c
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ramstage-$(CONFIG_INTEL_GMA_ADD_VBT) += vbt.c
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ramstage-$(CONFIG_INTEL_GMA_ADD_VBT) += vbt.c
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ramstage-$(CONFIG_MMA) += mma_core.c
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ramstage-$(CONFIG_MMA) += mma_core.c
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CPPFLAGS_common += -Isrc/drivers/intel/fsp1_1/include
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CPPFLAGS_common += -Isrc/drivers/intel/fsp1_1/include
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postcar-y += stage_cache.c
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ifneq ($(CONFIG_SKIP_FSP_CAR),y)
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ifneq ($(CONFIG_SKIP_FSP_CAR),y)
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postcar-y += temp_ram_exit.c
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postcar-y += temp_ram_exit.c
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postcar-y += exit_car.S
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postcar-y += exit_car.S
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@ -23,7 +23,6 @@
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#include <cpu/amd/msr.h>
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#include <cpu/amd/msr.h>
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#include <cpu/amd/mtrr.h>
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#include <cpu/amd/mtrr.h>
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#include <cbmem.h>
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#include <cbmem.h>
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#include <stage_cache.h>
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#include <arch/bert_storage.h>
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#include <arch/bert_storage.h>
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#include <soc/northbridge.h>
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#include <soc/northbridge.h>
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#include <soc/iomap.h>
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#include <soc/iomap.h>
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@ -82,15 +81,6 @@ static size_t smm_region_size(void)
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return CONFIG_SMM_TSEG_SIZE;
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return CONFIG_SMM_TSEG_SIZE;
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}
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}
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void stage_cache_external_region(void **base, size_t *size)
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{
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if (smm_subregion(SMM_SUBREGION_CACHE, base, size)) {
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printk(BIOS_ERR, "ERROR: No cache SMM subregion.\n");
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*base = NULL;
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*size = 0;
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}
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}
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void smm_region(void **start, size_t *size)
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void smm_region(void **start, size_t *size)
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{
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{
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*start = (void *)smm_region_start();
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*start = (void *)smm_region_start();
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@ -23,7 +23,6 @@
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#include <cpu/amd/msr.h>
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#include <cpu/amd/msr.h>
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#include <cpu/amd/mtrr.h>
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#include <cpu/amd/mtrr.h>
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#include <cbmem.h>
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#include <cbmem.h>
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#include <stage_cache.h>
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#include <arch/bert_storage.h>
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#include <arch/bert_storage.h>
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#include <soc/northbridge.h>
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#include <soc/northbridge.h>
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#include <soc/iomap.h>
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#include <soc/iomap.h>
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@ -82,15 +81,6 @@ static size_t smm_region_size(void)
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return CONFIG_SMM_TSEG_SIZE;
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return CONFIG_SMM_TSEG_SIZE;
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}
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}
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void stage_cache_external_region(void **base, size_t *size)
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{
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if (smm_subregion(SMM_SUBREGION_CACHE, base, size)) {
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printk(BIOS_ERR, "ERROR: No cache SMM subregion.\n");
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*base = NULL;
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*size = 0;
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}
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}
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void smm_region(void **start, size_t *size)
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void smm_region(void **start, size_t *size)
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{
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{
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*start = (void *)smm_region_start();
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*start = (void *)smm_region_start();
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@ -22,18 +22,6 @@
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#include <intelblocks/smm.h>
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#include <intelblocks/smm.h>
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#include <intelblocks/systemagent.h>
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#include <intelblocks/systemagent.h>
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#include <soc/pm.h>
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#include <soc/pm.h>
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#include <stage_cache.h>
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#if !CONFIG(PLATFORM_USES_FSP1_1)
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void stage_cache_external_region(void **base, size_t *size)
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{
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if (smm_subregion(SMM_SUBREGION_CACHE, base, size)) {
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printk(BIOS_ERR, "ERROR: No cache SMM subregion.\n");
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*base = NULL;
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*size = 0;
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}
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}
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#endif
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void smm_southbridge_clear_state(void)
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void smm_southbridge_clear_state(void)
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{
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{
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