src/mainboard/herobrine: Load respective QUP FW for I2C and SPI

Loading QUP FW as per herobrine and piglin configuration
for I2C, SPI and UART.

As part of the code clean up, update the header files of the
QUP drivers with the correct path.

BUG=b:182963902
TEST=Validated on qualcomm sc7280 development board.

Signed-off-by: Rajesh Patil <rajpat@codeaurora.org>
Change-Id: Ic218c6a91ffc4484830446d707d1f3403e2dc46b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57672
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shelley Chen <shchen@google.com>
This commit is contained in:
Rajesh Patil 2021-06-18 14:34:45 +05:30 committed by Shelley Chen
parent 4f96b064f2
commit 9a2ccc4e71
1 changed files with 23 additions and 0 deletions

View File

@ -9,6 +9,9 @@
#include <device/mmio.h> #include <device/mmio.h>
#include <bootblock_common.h> #include <bootblock_common.h>
#include <soc/clock.h> #include <soc/clock.h>
#include <soc/qupv3_config_common.h>
#include <soc/qup_se_handlers_common.h>
#include <soc/qcom_qup_se.h>
static void configure_sdhci(void) static void configure_sdhci(void)
{ {
@ -25,6 +28,26 @@ static void mainboard_init(struct device *dev)
/* Configure clock for SD card */ /* Configure clock for SD card */
clock_configure_sdcc(2, 50 * MHz); clock_configure_sdcc(2, 50 * MHz);
configure_sdhci(); configure_sdhci();
/*
* When coreboot firmware disables serial output,
* we still need to load console UART QUP FW for OS.
*/
if (!CONFIG(CONSOLE_SERIAL))
qupv3_se_fw_load_and_init(QUPV3_0_SE5, SE_PROTOCOL_UART, FIFO);
qupv3_se_fw_load_and_init(QUPV3_1_SE5, SE_PROTOCOL_I2C, MIXED); /* Touch I2C */
qupv3_se_fw_load_and_init(QUPV3_0_SE7, SE_PROTOCOL_UART, FIFO); /* BT UART */
#if CONFIG(BOARD_GOOGLE_HEROBRINE)
qupv3_se_fw_load_and_init(QUPV3_0_SE0, SE_PROTOCOL_I2C, MIXED); /* Audio I2C */
qupv3_se_fw_load_and_init(QUPV3_0_SE1, SE_PROTOCOL_I2C, MIXED); /* Trackpad I2C */
qupv3_se_fw_load_and_init(QUPV3_1_SE3, SE_PROTOCOL_SPI, MIXED); /* Fingerprint SPI */
#elif CONFIG(BOARD_GOOGLE_PIGLIN)
qupv3_se_fw_load_and_init(QUPV3_0_SE1, SE_PROTOCOL_I2C, GSI); /* APPS I2C */
qupv3_se_fw_load_and_init(QUPV3_1_SE4, SE_PROTOCOL_SPI, MIXED); /* ESIM SPI */
qupv3_se_fw_load_and_init(QUPV3_1_SE6, SE_PROTOCOL_SPI, MIXED); /* Fingerprint SPI */
#endif
} }
static void mainboard_enable(struct device *dev) static void mainboard_enable(struct device *dev)