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arch/arm64: add DMA_COHERENT region macros to memlayout 

BRANCH=none
BUG=none
TEST=build pass

Change-Id: Ia997ce97ad42234ab020af7bd007d57d7191ee86
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 604ac738e33fdfbaf093989ea13162c8506b9360
Original-Change-Id: I636a1a38d0f5af97926d4446f3edb91a359cce4c
Original-Signed-off-by: Jimmy Huang <jimmy.huang@mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/292551
Original-Commit-Ready: Yidi Lin <yidi.lin@mediatek.com>
Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/12584
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Jimmy Huang 2015-06-16 12:18:50 +08:00 committed by Patrick Georgi
parent 03688ec1da
commit 9b423a77d1
1 changed files with 5 additions and 0 deletions
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5
src/arch/arm64/include/arch/memlayout.h
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@ -22,6 +22,11 @@
REGION(ttb, addr, size, 4K) \ REGION(ttb, addr, size, 4K) \
_ = ASSERT(size % 4K == 0, "TTB size must be divisible by 4K!"); _ = ASSERT(size % 4K == 0, "TTB size must be divisible by 4K!");
#define DMA_COHERENT(addr, size) \
REGION(dma_coherent, addr, size, 4K) \
_ = ASSERT(size % 4K == 0, \
"DMA buffer should be multiple of smallest page size (4K)!");
/* ARM64 stacks need 16-byte alignment. */ /* ARM64 stacks need 16-byte alignment. */
#define STACK(addr, size) \ #define STACK(addr, size) \
REGION(stack, addr, size, 16) \ REGION(stack, addr, size, 16) \