soc/amd/common/block/include/spi: update fch_spi_early_init description

commit 90ac882a32 (soc/amd/common/block/
spi: introduce SOC_AMD_COMMON_BLOCK_SPI_4DW_BURST) introduced a Kconfig
option to enable/disable the 4DW burst support in the SPI flash data
prefetcher, but missed to update the documentation above the
fch_spi_early_init prototype, so update the outdated documentation now.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I07c4b0b02251da63d34a172e2636894e99845d6b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59931
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Felix Held 2021-11-29 21:17:19 +01:00
parent 858481e814
commit 9bfbcd2127
1 changed files with 1 additions and 1 deletions

View File

@ -94,7 +94,7 @@ struct spi_config {
* Perform early SPI initialization:
* 1. Sets SPI ROM base and enables SPI ROM
* 2. Enables SPI ROM prefetching
* 3. Disables 4dw burst
* 3. Disables 4 DWORD burst if !SOC_AMD_COMMON_BLOCK_SPI_4DW_BURST
* 4. Configures SPI speed and read mode.
*
* This function expects SoC to include soc_amd_common_config in chip SoC config and uses