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mb/intel/mtlrvp: Override display configuration 

This patch enables display configuration for mtlrvp. The change follows
mtlrvp schematics.

BUG=b:224325352
BRANCH=None
TEST=Able to observe corresponding UPD configuration with FSP dump.
Also verify display over eDP and HDMI.
DdiPortAConfig : 0x1
DdiPortBConfig : 0x0
DdiPortAHpd : 0x0
DdiPortBHpd : 0x1
DdiPortCHpd : 0x0
DdiPort1Hpd : 0x0
DdiPort2Hpd : 0x0
DdiPort3Hpd : 0x0
DdiPort4Hpd : 0x0
DdiPortADdc : 0x0
DdiPortBDdc : 0x1

Signed-off-by: Harsha B R <harsha.b.r@intel.com>
Change-Id: I05bd7427d6a339ee200731a8dd448e85efc694e0
Signed-off-by: Jamie Ryu <jamie.m.ryu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72645
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
This commit is contained in:
Harsha B R 2023-01-31 15:45:22 +05:30 committed by Sridhar Siricilla
parent 7b8cbdd76b
commit 9c471e7def
1 changed files with 7 additions and 0 deletions
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7
src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb
View File

@ -39,6 +39,13 @@ chip soc/intel/meteorlake
# Enable CNVi BT # Enable CNVi BT
register "cnvi_bt_core" = "true" register "cnvi_bt_core" = "true"
# Enable EDP in PortA
register "ddi_port_A_config" = "1"
# Enable HDMI in Port B
register "ddi_ports_config" = "{
[DDI_PORT_B] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
}"
device domain 0 on device domain 0 on
device ref igpu on end device ref igpu on end
device ref heci1 on end device ref heci1 on end