mb/intel/mtlrvp: Override display configuration
This patch enables display configuration for mtlrvp. The change follows mtlrvp schematics. BUG=b:224325352 BRANCH=None TEST=Able to observe corresponding UPD configuration with FSP dump. Also verify display over eDP and HDMI. DdiPortAConfig : 0x1 DdiPortBConfig : 0x0 DdiPortAHpd : 0x0 DdiPortBHpd : 0x1 DdiPortCHpd : 0x0 DdiPort1Hpd : 0x0 DdiPort2Hpd : 0x0 DdiPort3Hpd : 0x0 DdiPort4Hpd : 0x0 DdiPortADdc : 0x0 DdiPortBDdc : 0x1 Signed-off-by: Harsha B R <harsha.b.r@intel.com> Change-Id: I05bd7427d6a339ee200731a8dd448e85efc694e0 Signed-off-by: Jamie Ryu <jamie.m.ryu@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72645 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
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@ -39,6 +39,13 @@ chip soc/intel/meteorlake
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# Enable CNVi BT
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register "cnvi_bt_core" = "true"
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# Enable EDP in PortA
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register "ddi_port_A_config" = "1"
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# Enable HDMI in Port B
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register "ddi_ports_config" = "{
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[DDI_PORT_B] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
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}"
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device domain 0 on
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device ref igpu on end
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device ref heci1 on end
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