google/kahlee: Fix GPIO ASL
Use a single define and set the CROS GPIO ASL device to match the Stoney Ridge GPIO HID. Update the GPIO number to 142. Also, add a DDN field in the GPIO ASL. This addresses the TEST indicated below. BUG=b:65597554 BRANCH=none TEST=grep ^ /sys/devices/platform/chromeos_acpi/GPIO.*/* reports AMD0030. Change-Id: I1d6c42c6c9a0eef25e0e99aed6d838c767f5e01f Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/21614 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -13,6 +13,8 @@
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* GNU General Public License for more details.
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*/
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#include <soc/gpio.h>
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Device (AAHB)
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{
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Name (_HID, "AAHB0000")
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@ -30,9 +32,10 @@ Device (AAHB)
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Device (GPIO)
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{
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Name (_HID, "AMD0030")
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Name (_CID, "AMD0030")
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Name(_UID, 0)
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Name (_HID, GPIO_DEVICE_NAME)
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Name (_CID, GPIO_DEVICE_NAME)
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Name (_UID, 0)
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Name (_DDN, GPIO_DEVICE_DESC)
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Name (_CRS, ResourceTemplate()
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{
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@ -21,7 +21,7 @@
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#include <gpio.h>
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/* SPI Write protect */
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#define CROS_WP_GPIO GPIO_122
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#define CROS_WP_GPIO GPIO_142
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void fill_lb_gpios(struct lb_gpios *gpios)
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{
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@ -40,8 +40,8 @@ int get_write_protect_state(void)
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}
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static const struct cros_gpio cros_gpios[] = {
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CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME),
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CROS_GPIO_WP_AH(CROS_WP_GPIO, CROS_GPIO_DEVICE_NAME),
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CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, GPIO_DEVICE_NAME),
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CROS_GPIO_WP_AH(CROS_WP_GPIO, GPIO_DEVICE_NAME),
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};
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void mainboard_chromeos_acpi_generate(void)
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@ -16,11 +16,13 @@
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#ifndef __STONEYRIDGE_GPIO_H__
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#define __STONEYRIDGE_GPIO_H__
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#define GPIO_DEVICE_NAME "AMD0030"
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#define GPIO_DEVICE_DESC "GPIO Controller"
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#ifndef __ACPI__
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#include <soc/amd/common/amd_defs.h>
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#include <types.h>
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#define CROS_GPIO_DEVICE_NAME "AmdKern"
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#define GPIO_PIN_STS (1 << 16)
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#define GPIO_PULLUP_ENABLE (1 << 20)
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#define GPIO_PULLDOWN_ENABLE (1 << 21)
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@ -132,5 +134,5 @@
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#define GPIO_148 148
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typedef uint32_t gpio_t;
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#endif /* __ACPI__ */
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#endif /* __STONEYRIDGE_GPIO_H__ */
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