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Revert "mainboard/google/reef: Enable cr50 TPM interrupt" 

This reverts commit 24de342438.
This commit is contained in:
Duncan Laurie 2016-09-19 19:19:57 -07:00
parent 24de342438
commit 9d4b11c26a
2 changed files with 0 additions and 5 deletions
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4
src/mainboard/google/reef/Kconfig
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@ -10,7 +10,6 @@ config BOARD_GOOGLE_BASEBOARD_REEF
select I2C_TPM select I2C_TPM
select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_CHROMEOS
select MAINBOARD_HAS_TPM2 select MAINBOARD_HAS_TPM2
select MAINBOARD_HAS_I2C_TPM_CR50
select TPM2 select TPM2
if BOARD_GOOGLE_BASEBOARD_REEF if BOARD_GOOGLE_BASEBOARD_REEF
@ -25,9 +24,6 @@ config DRIVER_TPM_I2C_BUS
config DRIVER_TPM_I2C_ADDR config DRIVER_TPM_I2C_ADDR
hex "0x50" hex "0x50"
config DRIVER_TPM_I2C_IRQ
int "60" # GPE0_DW1_28
config CHROMEOS config CHROMEOS
select LID_SWITCH if BASEBOARD_REEF_LAPTOP select LID_SWITCH if BASEBOARD_REEF_LAPTOP

1
src/mainboard/google/reef/variants/baseboard/gpio.c
View File

@ -353,7 +353,6 @@ static const struct pad_config early_gpio_table[] = {
/* I2C2 - TPM */ /* I2C2 - TPM */
PAD_CFG_NF(GPIO_128, UP_2K, DEEP, NF1), /* LPSS_I2C2_SDA */ PAD_CFG_NF(GPIO_128, UP_2K, DEEP, NF1), /* LPSS_I2C2_SDA */
PAD_CFG_NF(GPIO_129, UP_2K, DEEP, NF1), /* LPSS_I2C2_SCL */ PAD_CFG_NF(GPIO_129, UP_2K, DEEP, NF1), /* LPSS_I2C2_SCL */
PAD_CFG_GPI_APIC_LOW(GPIO_28, NONE, DEEP), /* TPM IRQ */
/* WLAN_PE_RST - default to deasserted just in case FSP misbehaves. */ /* WLAN_PE_RST - default to deasserted just in case FSP misbehaves. */
PAD_CFG_GPO(GPIO_122, 0, DEEP), /* SIO_SPI_2_RXD */ PAD_CFG_GPO(GPIO_122, 0, DEEP), /* SIO_SPI_2_RXD */
}; };