cpu/intel: Fix the spacing issues

Fix the following errors and warnings detected by checkpatch.pl:

ERROR: spaces required around that '=' (ctx:VxV)
ERROR: space required after that ',' (ctx:VxV)
ERROR: space prohibited after that open parenthesis '('
ERROR: space prohibited before that close parenthesis ')'
ERROR: need consistent spacing around '-' (ctx:WxV)
ERROR: spaces required around that '>' (ctx:VxV)
ERROR: need consistent spacing around '>>' (ctx:WxV)
ERROR: need consistent spacing around '<<' (ctx:VxW)
ERROR: spaces required around that '||' (ctx:VxV)
ERROR: "foo * bar" should be "foo *bar"
ERROR: "(foo*)" should be "(foo *)"
WARNING: space prohibited between function name and open parenthesis '('
WARNING: storage class should be at the beginning of the declaration

TEST=Build and run on Galileo Gen2

Change-Id: I6602fbc8602171ab6c2f3b6c204558ad2c811179
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18847
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

src/cpu/intel/car/romstage.c

@@ -19,7 +19,7 @@
 
 #define DCACHE_RAM_ROMSTAGE_STACK_SIZE 0x2000
 
-void * asmlinkage romstage_main(unsigned long bist)
+asmlinkage void *romstage_main(unsigned long bist)
 {
 	int i;
 	void *romstage_stack_after_car;
@@ -47,7 +47,7 @@ void * asmlinkage romstage_main(unsigned long bist)
 	return romstage_stack_after_car;
 }
 
-void asmlinkage romstage_after_car(void)
+asmlinkage void romstage_after_car(void)
 {
 	/* Load the ramstage. */
 	run_ramstage();

src/cpu/intel/car/romstage_legacy.c

@@ -13,7 +13,7 @@
 
 #include <cpu/intel/romstage.h>
 
-void * asmlinkage romstage_main(unsigned long bist)
+asmlinkage void *romstage_main(unsigned long bist)
 {
 	mainboard_romstage_entry(bist);
 	return (void *)CONFIG_RAMTOP;

src/cpu/intel/haswell/haswell.h

@@ -180,10 +180,10 @@ void romstage_common(const struct romstage_params *params);
  *  +32: MTRR mask 1 63:32
  *  ...
  */
-void * asmlinkage romstage_main(unsigned long bist);
+asmlinkage void *romstage_main(unsigned long bist);
 /* romstage_after_car() is the C function called after cache-as-ram has
  * been torn down. It is responsible for loading the ramstage. */
-void asmlinkage romstage_after_car(void);
+asmlinkage void romstage_after_car(void);
 #endif
 
 #ifdef __SMM__

src/cpu/intel/haswell/romstage.c

@@ -140,7 +140,7 @@ static void *setup_romstage_stack_after_car(void)
 	return slot;
 }
 
-void * asmlinkage romstage_main(unsigned long bist)
+asmlinkage void *romstage_main(unsigned long bist)
 {
 	int i;
 	void *romstage_stack_after_car;
@@ -253,7 +253,7 @@ void romstage_common(const struct romstage_params *params)
 	}
 }
 
-void asmlinkage romstage_after_car(void)
+asmlinkage void romstage_after_car(void)
 {
 	/* Load the ramstage. */
 	run_ramstage();

src/cpu/intel/model_2065x/model_2065x_init.c

@@ -321,7 +321,8 @@ static void model_2065x_init(struct device *cpu)
 	/* Print processor name */
 	fill_processor_name(processor_name);
 	printk(BIOS_INFO, "CPU: %s.\n", processor_name);
-	printk(BIOS_INFO, "CPU:lapic=%ld, boot_cpu=%d\n", lapicid (), boot_cpu ());
+	printk(BIOS_INFO, "CPU:lapic=%ld, boot_cpu=%d\n", lapicid(),
+		boot_cpu());
 
 	/* Setup MTRRs based on physical address size */
 	x86_setup_mtrrs_with_detect();