baytrail: fix tsc rate
Despite some references to a fixed bclk in some of the docs the bclk is variable per sku. Therefore, perform the calculation according to the BSEL_CR_OVERCLOCK_CONTROL msr which provides the bclk for the cpu cores in Bay Trail. BUG=chrome-os-partner:23166 BRANCH=None TEST=Built and booted B3. correctly says: clocks_per_usec: 2133 Change-Id: I55da45d42e7672fdb3b821c8aed7340a6f73dd08 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/172771 Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: http://review.coreboot.org/4883 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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@ -21,6 +21,7 @@
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#define _BAYTRAIL_MSR_H_
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#define _BAYTRAIL_MSR_H_
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#define MSR_IA32_PLATFORM_ID 0x17
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#define MSR_IA32_PLATFORM_ID 0x17
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#define MSR_BSEL_CR_OVERCLOCK_CONTROL 0xcd
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#define MSR_PLATFORM_INFO 0xce
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#define MSR_PLATFORM_INFO 0xce
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#define MSR_IA32_PERF_CTL 0x199
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#define MSR_IA32_PERF_CTL 0x199
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#define MSR_IA32_MISC_ENABLES 0x1a0
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#define MSR_IA32_MISC_ENABLES 0x1a0
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@ -27,14 +27,29 @@
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#include <baytrail/romstage.h>
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#include <baytrail/romstage.h>
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#endif
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#endif
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#define BCLK 100 /* 100 MHz */
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unsigned long tsc_freq_mhz(void)
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unsigned long tsc_freq_mhz(void)
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{
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{
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msr_t platform_info;
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msr_t platform_info;
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msr_t clk_info;
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unsigned long bclk_khz;
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platform_info = rdmsr(MSR_PLATFORM_INFO);
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platform_info = rdmsr(MSR_PLATFORM_INFO);
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return BCLK * ((platform_info.lo >> 8) & 0xff);
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clk_info = rdmsr(MSR_BSEL_CR_OVERCLOCK_CONTROL);
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switch (clk_info.lo & 0x3) {
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case 0:
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bclk_khz = 83333;
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break;
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case 1:
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bclk_khz = 100000;
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break;
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case 2:
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bclk_khz = 133333;
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break;
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case 3:
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bclk_khz = 116666;
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break;
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}
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return (bclk_khz * ((platform_info.lo >> 8) & 0xff)) / 1000;
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}
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}
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void set_max_freq(void)
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void set_max_freq(void)
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