soc/intel/broadwell: Get rid of `cpu_is_ult`
It is only used in a single file, on two functions that already check whether coreboot is running on a Haswell or a Broadwell processor. Change-Id: I86e1061f722e6d6855190c2fd863d85fc24a1ee0 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46708 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -19,8 +19,6 @@ bootblock-y += ../../../cpu/x86/early_reset.S
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ramstage-y += acpi.c
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ramstage-y += cpu.c
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ramstage-y += cpu_info.c
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smm-y += cpu_info.c
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ramstage-y += finalize.c
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ramstage-y += gma.c
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ramstage-y += memmap.c
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@ -1,22 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <arch/cpu.h>
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#include <soc/cpu.h>
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#include <soc/msr.h>
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#include <soc/systemagent.h>
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/* Dynamically determine if the part is ULT. */
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int cpu_is_ult(void)
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{
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static int ult = -1;
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if (ult < 0) {
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u32 fm = cpu_family_model();
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if (fm == BROADWELL_FAMILY_ULT || fm == HASWELL_FAMILY_ULT)
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ult = 1;
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else
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ult = 0;
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}
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return ult;
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}
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@ -364,6 +364,7 @@ static int igd_get_cdclk_haswell(u32 *const cdsel, int *const inform_pc,
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/* Check for ULX GT1 or GT2 */
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const int devid = pci_read_config16(dev, PCI_DEVICE_ID);
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const int cpu_is_ult = cpu_family_model() == HASWELL_FAMILY_ULT;
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const int gpu_is_ulx = devid == IGD_HASWELL_ULX_GT1 ||
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devid == IGD_HASWELL_ULX_GT2;
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@ -378,7 +379,7 @@ static int igd_get_cdclk_haswell(u32 *const cdsel, int *const inform_pc,
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*/
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if (gpu_is_ulx && cdclk <= GT_CDCLK_337)
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cdclk = GT_CDCLK_337;
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else if (gpu_is_ulx || cpu_is_ult() ||
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else if (gpu_is_ulx || cpu_is_ult ||
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cdclk == GT_CDCLK_337 || cdclk == GT_CDCLK_450)
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cdclk = GT_CDCLK_450;
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else
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@ -398,6 +399,7 @@ static int igd_get_cdclk_broadwell(u32 *const cdsel, int *const inform_pc,
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/* Check for ULX */
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const int devid = pci_read_config16(dev, PCI_DEVICE_ID);
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const int cpu_is_ult = cpu_family_model() == BROADWELL_FAMILY_ULT;
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const int gpu_is_ulx = devid == IGD_BROADWELL_Y_GT2;
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/* Inform power controller of upcoming frequency change */
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@ -428,7 +430,7 @@ static int igd_get_cdclk_broadwell(u32 *const cdsel, int *const inform_pc,
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(gpu_is_ulx && cdclk == GT_CDCLK_DEFAULT))
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cdclk = GT_CDCLK_450;
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else if (cdclk == GT_CDCLK_540 || gpu_is_ulx ||
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(cpu_is_ult() && cdclk == GT_CDCLK_DEFAULT))
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(cpu_is_ult && cdclk == GT_CDCLK_DEFAULT))
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cdclk = GT_CDCLK_540;
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else
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cdclk = GT_CDCLK_675;
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@ -54,6 +54,4 @@ static inline u32 cpu_stepping(void)
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return cpuid_eax(1) & 0xf;
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}
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int cpu_is_ult(void);
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#endif
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