soc/intel/broadwell: Get rid of `cpu_is_ult`

It is only used in a single file, on two functions that already check
whether coreboot is running on a Haswell or a Broadwell processor.

Change-Id: I86e1061f722e6d6855190c2fd863d85fc24a1ee0
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46708
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2020-10-23 22:01:44 +02:00
parent 37164ff609
commit 9eaca7dcf4
4 changed files with 4 additions and 28 deletions

View File

@ -19,8 +19,6 @@ bootblock-y += ../../../cpu/x86/early_reset.S
ramstage-y += acpi.c
ramstage-y += cpu.c
ramstage-y += cpu_info.c
smm-y += cpu_info.c
ramstage-y += finalize.c
ramstage-y += gma.c
ramstage-y += memmap.c

View File

@ -1,22 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <arch/cpu.h>
#include <soc/cpu.h>
#include <soc/msr.h>
#include <soc/systemagent.h>
/* Dynamically determine if the part is ULT. */
int cpu_is_ult(void)
{
static int ult = -1;
if (ult < 0) {
u32 fm = cpu_family_model();
if (fm == BROADWELL_FAMILY_ULT || fm == HASWELL_FAMILY_ULT)
ult = 1;
else
ult = 0;
}
return ult;
}

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@ -364,6 +364,7 @@ static int igd_get_cdclk_haswell(u32 *const cdsel, int *const inform_pc,
/* Check for ULX GT1 or GT2 */
const int devid = pci_read_config16(dev, PCI_DEVICE_ID);
const int cpu_is_ult = cpu_family_model() == HASWELL_FAMILY_ULT;
const int gpu_is_ulx = devid == IGD_HASWELL_ULX_GT1 ||
devid == IGD_HASWELL_ULX_GT2;
@ -378,7 +379,7 @@ static int igd_get_cdclk_haswell(u32 *const cdsel, int *const inform_pc,
*/
if (gpu_is_ulx && cdclk <= GT_CDCLK_337)
cdclk = GT_CDCLK_337;
else if (gpu_is_ulx || cpu_is_ult() ||
else if (gpu_is_ulx || cpu_is_ult ||
cdclk == GT_CDCLK_337 || cdclk == GT_CDCLK_450)
cdclk = GT_CDCLK_450;
else
@ -398,6 +399,7 @@ static int igd_get_cdclk_broadwell(u32 *const cdsel, int *const inform_pc,
/* Check for ULX */
const int devid = pci_read_config16(dev, PCI_DEVICE_ID);
const int cpu_is_ult = cpu_family_model() == BROADWELL_FAMILY_ULT;
const int gpu_is_ulx = devid == IGD_BROADWELL_Y_GT2;
/* Inform power controller of upcoming frequency change */
@ -428,7 +430,7 @@ static int igd_get_cdclk_broadwell(u32 *const cdsel, int *const inform_pc,
(gpu_is_ulx && cdclk == GT_CDCLK_DEFAULT))
cdclk = GT_CDCLK_450;
else if (cdclk == GT_CDCLK_540 || gpu_is_ulx ||
(cpu_is_ult() && cdclk == GT_CDCLK_DEFAULT))
(cpu_is_ult && cdclk == GT_CDCLK_DEFAULT))
cdclk = GT_CDCLK_540;
else
cdclk = GT_CDCLK_675;

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@ -54,6 +54,4 @@ static inline u32 cpu_stepping(void)
return cpuid_eax(1) & 0xf;
}
int cpu_is_ult(void);
#endif