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vendorcode/amd: kill some intermediate variables in build system 

They don't exactly add clarity, but increase the risk
they're used at some obscure place.

Change-Id: Ic74f72dae3f9b7eb2343cb5c51bc44c888e1276c
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/5787
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Patrick Georgi 2014-05-18 23:30:56 +02:00
parent e3927436c6
commit 9f5af6a65a
10 changed files with 22 additions and 84 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/vendorcode/amd/agesa/f10/Makefile.inc
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@ -43,11 +43,9 @@ AGESA_INC += -I$(AGESA_ROOT)/Proc/Recovery/CPU
AGESA_INC += -I$(AGESA_ROOT)/Proc/Recovery/Mem AGESA_INC += -I$(AGESA_ROOT)/Proc/Recovery/Mem
## AGESA need sse feature ## ## AGESA need sse feature ##
AGESA_CFLAGS = -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing CFLAGS_x86_32 += -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing
export AGESA_ROOT export AGESA_ROOT
export AGESA_INC export AGESA_INC
export AGESA_CFLAGS
CPPFLAGS_x86_32 += $(AGESA_INC) CPPFLAGS_x86_32 += $(AGESA_INC)
CFLAGS_x86_32 += $(AGESA_CFLAGS)

5
src/vendorcode/amd/agesa/f12/Makefile.inc
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@ -78,11 +78,8 @@ AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem/NB/LN
AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem/Tech AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem/Tech
AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem/Tech/DDR3 AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem/Tech/DDR3
AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing CFLAGS_x86_32 += -march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing
export AGESA_ROOT := $(AGESA_ROOT)
export AGESA_INC := $(AGESA_INC) export AGESA_INC := $(AGESA_INC)
export AGESA_CFLAGS := $(AGESA_CFLAGS)
CPPFLAGS_x86_32 += $(AGESA_INC) CPPFLAGS_x86_32 += $(AGESA_INC)
CFLAGS_x86_32 += $(AGESA_CFLAGS)
####################################################################### #######################################################################

4
src/vendorcode/amd/agesa/f14/Makefile.inc
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@ -62,13 +62,11 @@ AGESA_INC += -I$(AGESA_ROOT)/Proc/Recovery/GNB
AGESA_INC += -I$(AGESA_ROOT)/Proc/Recovery/CPU AGESA_INC += -I$(AGESA_ROOT)/Proc/Recovery/CPU
AGESA_INC += -I$(AGESA_ROOT)/Proc/Recovery/Mem AGESA_INC += -I$(AGESA_ROOT)/Proc/Recovery/Mem
AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing CFLAGS_x86_32 += -march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing
export AGESA_ROOT := $(AGESA_ROOT) export AGESA_ROOT := $(AGESA_ROOT)
export AGESA_INC := $(AGESA_INC) export AGESA_INC := $(AGESA_INC)
export AGESA_CFLAGS := $(AGESA_CFLAGS)
CPPFLAGS_x86_32 += $(AGESA_INC) CPPFLAGS_x86_32 += $(AGESA_INC)
CFLAGS_x86_32 += $(AGESA_CFLAGS)
####################################################################### #######################################################################
classes-y += libagesa classes-y += libagesa

4
src/vendorcode/amd/agesa/f15/Makefile.inc
View File

@ -511,10 +511,8 @@ romstage-y += $(agesa_lib_src)
ramstage-y += $(agesa_lib_src) ramstage-y += $(agesa_lib_src)
## AGESA need sse feature ## ## AGESA need sse feature ##
AGESA_CFLAGS = -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing CFLAGS_x86_32 += -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing
export AGESA_ROOT export AGESA_ROOT
export AGESA_INC export AGESA_INC
export AGESA_CFLAGS
CPPFLAGS_x86_32 += $(AGESA_INC) CPPFLAGS_x86_32 += $(AGESA_INC)
CFLAGS_x86_32 += $(AGESA_CFLAGS)

4
src/vendorcode/amd/agesa/f15tn/Makefile.inc
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@ -75,13 +75,11 @@ AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Include/Library
AGESA_INC += -I$(src)/southbridge/amd/agesa/hudson AGESA_INC += -I$(src)/southbridge/amd/agesa/hudson
AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing CFLAGS_x86_32 += -march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing
export AGESA_ROOT := $(AGESA_ROOT) export AGESA_ROOT := $(AGESA_ROOT)
export AGESA_INC := $(AGESA_INC) export AGESA_INC := $(AGESA_INC)
export AGESA_CFLAGS := $(AGESA_CFLAGS)
CPPFLAGS_x86_32 += $(AGESA_INC) CPPFLAGS_x86_32 += $(AGESA_INC)
CFLAGS_x86_32 += $(AGESA_CFLAGS)
####################################################################### #######################################################################
classes-y += libagesa classes-y += libagesa

4
src/vendorcode/amd/agesa/f16kb/Makefile.inc
View File

@ -77,11 +77,9 @@ AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem/Feat/RDWR2DTRAINING
AGESA_INC += -I$(src)/southbridge/amd/agesa/hudson AGESA_INC += -I$(src)/southbridge/amd/agesa/hudson
AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing CFLAGS_x86_32 += -march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing
export AGESA_ROOT := $(AGESA_ROOT) export AGESA_ROOT := $(AGESA_ROOT)
export AGESA_INC := $(AGESA_INC) export AGESA_INC := $(AGESA_INC)
export AGESA_CFLAGS := $(AGESA_CFLAGS)
CPPFLAGS_x86_32 += $(AGESA_INC) CPPFLAGS_x86_32 += $(AGESA_INC)
CFLAGS_x86_32 += $(AGESA_CFLAGS)
####################################################################### #######################################################################

22
src/vendorcode/amd/cimx/rd890/Makefile.inc
View File

@ -27,13 +27,10 @@
# #
#***************************************************************************** #*****************************************************************************
# CIMX Root directory CPPFLAGS_x86_32 += -I$(src)/mainboard/$(MAINBOARDDIR)
CIMX_ROOT = $(src)/vendorcode/amd/cimx CPPFLAGS_x86_32 += -I$(src)/northbridge/amd/cimx/rd890
CPPFLAGS_x86_32 += -I$(src)/include/cpu/amd/common
NB_CIMX_INC = -I$(src)/mainboard/$(MAINBOARDDIR) CPPFLAGS_x86_32 += -I$(src)/vendorcode/amd/cimx/rd890
NB_CIMX_INC += -I$(src)/northbridge/amd/cimx/rd890
NB_CIMX_INC += -I$(src)/include/cpu/amd/common
NB_CIMX_INC += -I$(CIMX_ROOT)/rd890
romstage-y += amdAcpiIvrs.c romstage-y += amdAcpiIvrs.c
romstage-y += amdAcpiLib.c romstage-y += amdAcpiLib.c
@ -108,14 +105,3 @@ ramstage-y += nbPowerOnReset.c
#ramstage-y += nbRecovery.c #ramstage-y += nbRecovery.c
#ramstage-y += nbRecoveryInitializer.c #ramstage-y += nbRecoveryInitializer.c
ramstage-y += nbMaskedMemoryInit32.S ramstage-y += nbMaskedMemoryInit32.S
NB_CIMX_CFLAGS =
export CIMX_ROOT
export NB_CIMX_INC
export NB_CIMX_CFLAGS
CPPFLAGS_x86_32 += $(NB_CIMX_INC)
CFLAGS_x86_32 += $(NB_CIMX_CFLAGS)
#######################################################################

19
src/vendorcode/amd/cimx/sb700/Makefile.inc
View File

@ -27,13 +27,10 @@
# #
#***************************************************************************** #*****************************************************************************
# CIMX Root directory CPPFLAGS_x86_32 += -I$(src)/mainboard/$(MAINBOARDDIR)
CIMX_ROOT = $(src)/vendorcode/amd/cimx CPPFLAGS_x86_32 += -I$(src)/southbridge/amd/cimx/sb700
CPPFLAGS_x86_32 += -I$(src)/include/cpu/amd/common
SB_CIMX_INC = -I$(src)/mainboard/$(MAINBOARDDIR) CPPFLAGS_x86_32 += -I$(src)/vendorcode/amd/cimx/sb700
SB_CIMX_INC += -I$(src)/southbridge/amd/cimx/sb700
SB_CIMX_INC += -I$(src)/include/cpu/amd/common
SB_CIMX_INC += -I$(CIMX_ROOT)/sb700
romstage-y += ACPILIB.c romstage-y += ACPILIB.c
romstage-y += AMDLIB.c romstage-y += AMDLIB.c
@ -67,11 +64,3 @@ ramstage-y += SBPOR.c
ramstage-y += SMM.c ramstage-y += SMM.c
ramstage-y += USB.c ramstage-y += USB.c
ramstage-y += LEGACY.c ramstage-y += LEGACY.c
export CIMX_ROOT
export SB_CIMX_INC
export SB_CIMX_CFLAGS
CPPFLAGS_x86_32 += $(SB_CIMX_INC)
#######################################################################

20
src/vendorcode/amd/cimx/sb800/Makefile.inc
View File

@ -17,13 +17,10 @@
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
# #
# CIMX Root directory CPPFLAGS_x86_32 += -I$(src)/mainboard/$(MAINBOARDDIR)
CIMX_ROOT = $(src)/vendorcode/amd/cimx CPPFLAGS_x86_32 += -I$(src)/southbridge/amd/cimx/sb800
CPPFLAGS_x86_32 += -I$(src)/include/cpu/amd/common
CIMX_INC = -I$(src)/mainboard/$(MAINBOARDDIR) CPPFLAGS_x86_32 += -I$(src)/vendorcode/amd/cimx/sb800
CIMX_INC += -I$(src)/southbridge/amd/cimx/sb800
CIMX_INC += -I$(src)/include/cpu/amd/common
CIMX_INC += -I$(CIMX_ROOT)/sb800
romstage-y += ACPILIB.c romstage-y += ACPILIB.c
romstage-y += AZALIA.c romstage-y += AZALIA.c
@ -74,12 +71,3 @@ ramstage-y += SMM.c
ramstage-y += USB.c ramstage-y += USB.c
#ramstage-y += LEGACY.c #ramstage-y += LEGACY.c
#ramstage-y += SbModInf.c #ramstage-y += SbModInf.c
CIMX_CFLAGS =
export CIMX_ROOT
export CIMX_INC
export CIMX_CFLAGS
CPPFLAGS_x86_32 += $(CIMX_INC)
#######################################################################

20
src/vendorcode/amd/cimx/sb900/Makefile.inc
View File

@ -17,13 +17,10 @@
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
# #
# CIMX Root directory CPPFLAGS_x86_32 += -I$(src)/mainboard/$(MAINBOARDDIR)
CIMX_ROOT = $(src)/vendorcode/amd/cimx CPPFLAGS_x86_32 += -I$(src)/southbridge/amd/cimx/sb900
CPPFLAGS_x86_32 += -I$(src)/include/cpu/amd/common
CIMX_INC = -I$(src)/mainboard/$(MAINBOARDDIR) CPPFLAGS_x86_32 += -I$(src)/vendorcode/amd/cimx/sb900
CIMX_INC += -I$(src)/southbridge/amd/cimx/sb900
CIMX_INC += -I$(src)/include/cpu/amd/common
CIMX_INC += -I$(CIMX_ROOT)/sb900
romstage-y += AcpiLib.c romstage-y += AcpiLib.c
romstage-y += Azalia.c romstage-y += Azalia.c
@ -77,12 +74,3 @@ ramstage-y += Usb.c
#ramstage-y += SbModInf.c #ramstage-y += SbModInf.c
ramstage-y += Debug.c ramstage-y += Debug.c
ramstage-y += Hwm.c ramstage-y += Hwm.c
CIMX_CFLAGS =
export CIMX_ROOT
export CIMX_INC
export CIMX_CFLAGS
CPPFLAGS_x86_32 += $(CIMX_INC)
#######################################################################