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mb/amd/chausie/chromeos.fmd: increase A/B RW section size to 4MB 

To have enough space in the A/B RW sections, increase those sizes to 4
MByte and decrease the RO section size to 6 MByte to free up the space
needed for that.

Signed-off-by: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ib107fd05cfb0ef7de95425abcce6c82b88a9835d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62926
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
This commit is contained in:
Nikolai Vyssotski 2022-02-18 18:21:26 -06:00 committed by Felix Held
parent 629f8c5da1
commit 9f85958b7e
1 changed files with 3 additions and 3 deletions
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6
src/mainboard/amd/chausie/chromeos.fmd
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@ -2,12 +2,12 @@ FLASH@0xFF000000 16M {
SI_BIOS {
EC 4K
RW_MRC_CACHE(PRESERVE) 96K
RW_SECTION_A 3M {
RW_SECTION_A 4M {
VBLOCK_A 8K
FW_MAIN_A(CBFS)
RW_FWID_A 256
}
RW_SECTION_B 3M {
RW_SECTION_B 4M {
VBLOCK_B 8K
FW_MAIN_B(CBFS)
RW_FWID_B 256
@ -21,7 +21,7 @@ FLASH@0xFF000000 16M {
RW_NVRAM(PRESERVE) 20K
SMMSTORE(PRESERVE) 4K
RW_LEGACY(CBFS)
WP_RO@8M 8M {
WP_RO@10M 6M {
RO_VPD(PRESERVE) 16K
RO_SECTION {
FMAP 2K