vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3197
Update FSP headers for Tiger Lake platform generated based FSP version 3197, which includes below additional UPDs: FSPM: CmdMirror RMTBIT FSPS: SataPortsEnableDitoConfig BUG=b:157725468 BRANCH=none TEST=build and boot volteer Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> Change-Id: I23d6baacc3d963b473280c7fdb1e5df950cd7ca8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41974 Reviewed-by: Caveh Jalali <caveh@chromium.org> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Srinidhi N Kaushik
Shelley Chen
parent
b763a4febc
commit
9ff79c2280
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@ -801,7 +801,17 @@ typedef struct {
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/** Offset 0x05C1 - Reserved
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**/
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UINT8 Reserved30[109];
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UINT8 Reserved30[102];
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/** Offset 0x0627 - Rank Margin Tool Per Bit
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Enable/Disable Rank Margin Tool Per Bit
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$EN_DIS
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**/
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UINT8 RMTBIT;
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/** Offset 0x0628 - Reserved
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**/
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UINT8 Reserved31[6];
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/** Offset 0x062E - Ch Hash Mask
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Set the BIT(s) to be included in the XOR function. NOTE BIT mask corresponds to
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@ -811,7 +821,7 @@ typedef struct {
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/** Offset 0x0630 - Reserved
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**/
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UINT8 Reserved31[62];
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UINT8 Reserved32[62];
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/** Offset 0x066E - PcdSerialDebugLevel
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Serial Debug Message Level. 0:Disable, 1:Error Only, 2:Error & Warnings, 3:Load,
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@ -824,7 +834,7 @@ typedef struct {
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/** Offset 0x066F - Reserved
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**/
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UINT8 Reserved32[2];
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UINT8 Reserved33[2];
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/** Offset 0x0671 - Safe Mode Support
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This option configures the varous items in the IO and MC to be more conservative.(def=Disable)
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@ -834,7 +844,7 @@ typedef struct {
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/** Offset 0x0672 - Reserved
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**/
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UINT8 Reserved33[2];
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UINT8 Reserved34[2];
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/** Offset 0x0674 - TCSS USB Port Enable
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Bitmap for per port enabling
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@ -843,7 +853,17 @@ typedef struct {
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/** Offset 0x0675 - Reserved
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**/
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UINT8 Reserved34[80];
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UINT8 Reserved35[71];
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/** Offset 0x06BC - Command Pins Mirrored
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BitMask where bits [3:0] are Controller 0 Channel [3:0] and bits [7:4] are Controller
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1 Channel [3:0]. 0 = No Command Mirror and 1 = Command Mirror.
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**/
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UINT32 CmdMirror[1];
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/** Offset 0x06C0 - Reserved
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**/
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UINT8 Reserved36[5];
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/** Offset 0x06C5 - Skip external display device scanning
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Enable: Do not scan for external display device, Disable (Default): Scan external
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@ -854,7 +874,7 @@ typedef struct {
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/** Offset 0x06C6 - Reserved
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**/
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UINT8 Reserved35[2];
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UINT8 Reserved37[2];
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/** Offset 0x06C8 - Lock PCU Thermal Management registers
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Lock PCU Thermal Management registers. Enable(Default)=1, Disable=0
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@ -864,7 +884,7 @@ typedef struct {
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/** Offset 0x06C9 - Reserved
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**/
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UINT8 Reserved36[122];
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UINT8 Reserved38[122];
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/** Offset 0x0743 - Enable HD Audio Link
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Enable/disable HD Audio Link. Muxed with SSP0/SSP1/SNDW1.
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@ -874,7 +894,7 @@ typedef struct {
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/** Offset 0x0744 - Reserved
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**/
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UINT8 Reserved37[3];
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UINT8 Reserved39[3];
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/** Offset 0x0747 - Enable HD Audio DMIC_N Link
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Enable/disable HD Audio DMIC1 link. Muxed with SNDW3.
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@ -883,7 +903,7 @@ typedef struct {
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/** Offset 0x0749 - Reserved
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**/
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UINT8 Reserved38[3];
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UINT8 Reserved40[3];
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/** Offset 0x074C - DMIC<N> ClkA Pin Muxing (N - DMIC number)
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Determines DMIC<N> ClkA Pin muxing. See GPIO_*_MUXING_DMIC<N>_CLKA_*
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@ -903,7 +923,7 @@ typedef struct {
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/** Offset 0x075D - Reserved
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**/
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UINT8 Reserved39[3];
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UINT8 Reserved41[3];
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/** Offset 0x0760 - DMIC<N> Data Pin Muxing
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Determines DMIC<N> Data Pin muxing. See GPIO_*_MUXING_DMIC<N>_DATA_*
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@ -940,7 +960,7 @@ typedef struct {
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/** Offset 0x0775 - Reserved
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**/
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UINT8 Reserved40[297];
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UINT8 Reserved42[297];
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/** Offset 0x089E - Serial Io Uart Debug Mode
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Select SerialIo Uart Controller mode
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@ -951,7 +971,7 @@ typedef struct {
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/** Offset 0x089F - Reserved
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**/
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UINT8 Reserved41[121];
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UINT8 Reserved43[121];
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} FSP_M_CONFIG;
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/** Fsp M UPD Configuration
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@ -727,7 +727,12 @@ typedef struct {
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/** Offset 0x085B - Reserved
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**/
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UINT8 Reserved40[50];
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UINT8 Reserved40[42];
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/** Offset 0x0885 - Enable SATA Port Enable Dito Config
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Enable DEVSLP Idle Timeout settings (DmVal, DitoVal).
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**/
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UINT8 SataPortsEnableDitoConfig[8];
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/** Offset 0x088D - Enable SATA Port DmVal
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DITO multiplier. Default is 15.
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@ -879,7 +884,7 @@ typedef struct {
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/** Offset 0x0DB0 - Reserved
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**/
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UINT8 Reserved52[224];
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UINT8 Reserved52[232];
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} FSP_S_CONFIG;
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/** Fsp S UPD Configuration
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@ -894,11 +899,11 @@ typedef struct {
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**/
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FSP_S_CONFIG FspsConfig;
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/** Offset 0x0E90
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/** Offset 0x0E98
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**/
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UINT8 UnusedUpdSpace36[6];
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/** Offset 0x0E96
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/** Offset 0x0E9E
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**/
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UINT16 UpdTerminator;
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} FSPS_UPD;
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