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mb/google/rex: Add chip config for gspi devices 

+-----------+-------------+------------------+
| INTERFACE | PCI (B:D:F) | DEVICE           |
+-----------+-------------+------------------+
| GSPI-0    | 0:0x1e:2    | NA               |
+-----------+-------------+------------------+
| GSPI-1    | 0:0x1e:3    | Finger Print MCU |
+-----------+-------------+------------------+
| GSPI-2    | 0:0x12:6    | NA               |
+-----------+-------------+------------------+

BUG=b:224325352
TEST=Able to build Google/Rex and boot to emulator.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I4b20e342cbca60821f82c07f72328cf63c0e5404
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65763
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
Subrata Banik 2022-07-12 09:51:35 +00:00 committed by Felix Held
parent e54a8fd432
commit 9ffaf7f692
1 changed files with 6 additions and 0 deletions
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6
src/mainboard/google/rex/variants/rex0/overridetree.cb
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@ -1,5 +1,11 @@
chip soc/intel/meteorlake chip soc/intel/meteorlake
register "serial_io_gspi_mode" = "{
[PchSerialIoIndexGSPI0] = PchSerialIoDisabled,
[PchSerialIoIndexGSPI1] = PchSerialIoPci,
[PchSerialIoIndexGSPI2] = PchSerialIoDisabled,
}"
register "serial_io_i2c_mode" = "{ register "serial_io_i2c_mode" = "{
[PchSerialIoIndexI2C0] = PchSerialIoPci, [PchSerialIoIndexI2C0] = PchSerialIoPci,
[PchSerialIoIndexI2C1] = PchSerialIoPci, [PchSerialIoIndexI2C1] = PchSerialIoPci,