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libpayload: add x86 ROM variable MTRR support 

On x86, coreboot may allocate a variable range MTRR for enabling caching
of the system ROM. Add the ability to parse this structure and add the
result to the sysinfo structure.

An example usage implementation would be to obtain the variable MTRR
index that covers the ROM from the sysinfo structure. Then one would
disable caching and change the MTRR type from uncacheable to
write-protect and enable caching. The opposite sequence is required
to tearn down the caching.

Change-Id: I3bfe2028d8574d3adb1d85292abf8f1372cf97fa
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2920
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Aaron Durbin 2013-03-26 13:34:37 -05:00 committed by Stefan Reinauer
parent bc07f5d935
commit a09760eb45
3 changed files with 33 additions and 1 deletions
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17
payloads/libpayload/arch/x86/coreboot.c
View File

@ -158,6 +158,12 @@ static void cb_parse_framebuffer(void *ptr, struct sysinfo_t *info)
}
#endif
static void cb_parse_x86_rom_var_mtrr(void *ptr, struct sysinfo_t *info)
{
struct cb_x86_rom_mtrr *rom_mtrr = ptr;
info->x86_rom_var_mtrr_index = rom_mtrr->index;
}
static void cb_parse_string(unsigned char *ptr, char **info)
{
*info = (char *)((struct cb_string *)ptr)->string;
@ -281,6 +287,9 @@ static int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
case CB_TAG_MRC_CACHE:
cb_parse_mrc_cache(ptr, info);
break;
case CB_TAG_X86_ROM_MTRR:
cb_parse_x86_rom_var_mtrr(ptr, info);
break;
}
ptr += rec->size;
@ -294,7 +303,13 @@ static int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
int get_coreboot_info(struct sysinfo_t *info)
{
int ret = cb_parse_header(phys_to_virt(0x00000000), 0x1000, info);
int ret;
/* Ensure the variable range MTRR index covering the ROM is set to
* an invalid value. */
info->x86_rom_var_mtrr_index = -1;
ret = cb_parse_header(phys_to_virt(0x00000000), 0x1000, info);
if (ret != 1)
ret = cb_parse_header(phys_to_virt(0x000f0000), 0x1000, info);

12
payloads/libpayload/include/coreboot_tables.h
View File

@ -217,6 +217,18 @@ struct cb_vboot_handoff {
uint32_t vboot_handoff_size;
};
#define CB_TAG_X86_ROM_MTRR 0x0021
struct cb_x86_rom_mtrr {
uint32_t tag;
uint32_t size;
/* The variable range MTRR index covering the ROM. If one wants to
* enable caching the ROM, the variable MTRR needs to be set to
* write-protect. To disable the caching after enabling set the
* type to uncacheable. */
uint32_t index;
};
#define CB_TAG_CMOS_OPTION_TABLE 0x00c8
struct cb_cmos_option_table {
u32 tag;

5
payloads/libpayload/include/sysinfo.h
View File

@ -99,6 +99,11 @@ struct sysinfo_t {
void *vdat_addr;
u32 vdat_size;
#endif
#ifdef CONFIG_ARCH_X86
int x86_rom_var_mtrr_index;
#endif
void *tstamp_table;
void *cbmem_cons;
void *mrc_cache;