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soc/amd/stoneyridge: Generate MCFG table 

BUG=crbug:948241
TEST=Booted and decompiled the table
[000h 0000   4]                    Signature : "MCFG"
[004h 0004   4]                 Table Length : 0000003C
[008h 0008   1]                     Revision : 01
[009h 0009   1]                     Checksum : 15
[00Ah 0010   6]                       Oem ID : "COREv4"
[010h 0016   8]                 Oem Table ID : "COREBOOT"
[018h 0024   4]                 Oem Revision : 00000000
[01Ch 0028   4]              Asl Compiler ID : "CORE"
[020h 0032   4]        Asl Compiler Revision : 00000000

[024h 0036   8]                     Reserved : 0000000000000000

[02Ch 0044   8]                 Base Address : 00000000F8000000
[034h 0052   2]         Segment Group Number : 0000
[036h 0054   1]             Start Bus Number : 00
[037h 0055   1]               End Bus Number : 40
[038h 0056   4]                     Reserved : 00000000

Change-Id: I46dc1959971af4685a7ffd285429175d6882ae86
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32445
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Raul E Rangel 2019-04-24 11:20:01 -06:00 committed by Martin Roth
parent 74f9fe6e58
commit a11553dabd
1 changed files with 7 additions and 1 deletions
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8
src/soc/amd/stoneyridge/lpc.c
View File

@ -328,7 +328,13 @@ static void lpc_enable_resources(struct device *dev)
unsigned long acpi_fill_mcfg(unsigned long current)
{
/* Just a dummy */
current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current,
CONFIG_MMCONF_BASE_ADDRESS,
0,
0,
CONFIG_MMCONF_BUS_NUMBER);
return current;
}