soc/amd/stoneyridge/psp: use PSP_MAILBOX_BAR define

PSP_MAILBOX_BAR is defined as PCI_BASE_ADDRESS_4, so use it instead of
PCI_BASE_ADDRESS_4 in the code.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I8658b674b9adea85dfc71d7036ccf3ae17464b58
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59700
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
Felix Held 2021-11-26 22:47:43 +01:00
parent f3644ddae5
commit a19d6253f8
1 changed files with 1 additions and 1 deletions

View File

@ -51,7 +51,7 @@ void *soc_get_mbox_address(void)
return 0; return 0;
} }
} else { } else {
psp_mmio = pci_read_config32(SOC_PSP_DEV, PCI_BASE_ADDRESS_4) & psp_mmio = pci_read_config32(SOC_PSP_DEV, PSP_MAILBOX_BAR) &
~PCI_BASE_ADDRESS_MEM_ATTR_MASK; ~PCI_BASE_ADDRESS_MEM_ATTR_MASK;
} }