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soc/mediatek/mt8195: Change fsrc source to ulposc 

Set fsrc source to ulposc_d10 for 26m off low power scenario.

Signed-off-by: chun-jie.chen <chun-jie.chen@mediatek.com>
Change-Id: Ifb02d32820944d7cfbbf23de638e9a0e82b5e84d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54870
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
chun-jie.chen 2021-05-18 23:06:15 +08:00 committed by Hung-Te Lin
parent fb5fa1abe7
commit a36a68b027
1 changed files with 1 additions and 1 deletions
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src/soc/mediatek/mt8195/pll.c
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@ -469,7 +469,7 @@ static const struct mux_sel mux_sels[] = {
{ .id = TOP_SPINOR_SEL, .sel = 3 }, /* 3: univpll_d6_d8 */ { .id = TOP_SPINOR_SEL, .sel = 3 }, /* 3: univpll_d6_d8 */
/* CLK_CFG_29 */ /* CLK_CFG_29 */
{ .id = TOP_DVIO_DGI_REF_SEL, .sel = 1 }, /* 1: in_dgi_ck */ { .id = TOP_DVIO_DGI_REF_SEL, .sel = 1 }, /* 1: in_dgi_ck */
{ .id = TOP_SRCK_SEL, .sel = 1 }, /* 1: xtal_26m_ck */ { .id = TOP_SRCK_SEL, .sel = 0 }, /* 0: ulposc_d10 */
/* CLK_MISC_CFG_3 */ /* CLK_MISC_CFG_3 */
{ .id = TOP_MFG_FAST_SEL, .sel = 1 }, /* 1: AD_MFGPLL_OPP_CK */ { .id = TOP_MFG_FAST_SEL, .sel = 1 }, /* 1: AD_MFGPLL_OPP_CK */
}; };