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mediatek/mt8183: Remove unnecessary parentheses 

Parentheses are unnecessary for conditions like '(a == b) || (c == d)'.

Change-Id: I0c554bf1577b40286f7a51a8fc5804bdbb7c8bd1
Signed-off-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35142
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Huayang Duan <huayang.duan@mediatek.corp-partner.google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Yu-Ping Wu 2019-08-29 10:54:14 +08:00 committed by Patrick Georgi
parent 4822630c0c
commit a39cd99b26
3 changed files with 7 additions and 7 deletions
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2
src/soc/mediatek/mt8183/dramc_pi_basic_api.c
View File

@ -63,7 +63,7 @@ void dramc_sw_impedance(const struct sdram_params *params)
(sw_impedance[dq_term][0] << 5) | (sw_impedance[dq_term][0] << 5) |
(sw_impedance[dq_term][1] << 0)); (sw_impedance[dq_term][1] << 0));
clrsetbits_le32(&ch[0].ao.shu[0].drving[1], clrsetbits_le32(&ch[0].ao.shu[0].drving[1],
(0x1f << 25)|(0x1f << 20) | (1 << 31), (0x1f << 25) | (0x1f << 20) | (1 << 31),
(sw_impedance[dq_term][0] << 25) | (sw_impedance[dq_term][0] << 25) |
(sw_impedance[dq_term][1] << 20) | (!dq_term << 31)); (sw_impedance[dq_term][1] << 20) | (!dq_term << 31));
clrsetbits_le32(&ch[0].ao.shu[0].drving[2], (0x1f << 5) | (0x1f << 0), clrsetbits_le32(&ch[0].ao.shu[0].drving[2], (0x1f << 5) | (0x1f << 0),

8
src/soc/mediatek/mt8183/dramc_pi_calibration_api.c
View File

@ -1378,7 +1378,7 @@ static bool dramc_calc_best_dly(u8 bit,
static void dramc_set_dqdqs_dly(u8 chn, u8 rank, enum CAL_TYPE type, s32 dly) static void dramc_set_dqdqs_dly(u8 chn, u8 rank, enum CAL_TYPE type, s32 dly)
{ {
if ((type == RX_WIN_RD_DQC) || (type == RX_WIN_TEST_ENG)) if (type == RX_WIN_RD_DQC || type == RX_WIN_TEST_ENG)
dramc_set_rx_dly(chn, rank, dly); dramc_set_rx_dly(chn, rank, dly);
else else
dramc_set_tx_dly_factor(chn, rank, type, dly); dramc_set_tx_dly_factor(chn, rank, type, dly);
@ -1553,7 +1553,7 @@ static u8 dramc_window_perbit_cal(u8 chn, u8 rank,
dramc_dbg("[channel %d] [rank %d] type:%d, vref_enable:%d\n", dramc_dbg("[channel %d] [rank %d] type:%d, vref_enable:%d\n",
chn, rank, type, vref_scan_enable); chn, rank, type, vref_scan_enable);
if ((type == TX_WIN_DQ_ONLY) || (type == TX_WIN_DQ_DQM)) { if (type == TX_WIN_DQ_ONLY || type == TX_WIN_DQ_DQM) {
for (size_t i = 0; i < 2; i++) { for (size_t i = 0; i < 2; i++) {
write32(&ch[chn].phy.shu[0].rk[rank].b[i].dq[0], 0); write32(&ch[chn].phy.shu[0].rk[rank].b[i].dq[0], 0);
clrbits_le32(&ch[chn].phy.shu[0].rk[rank].b[i].dq[1], clrbits_le32(&ch[chn].phy.shu[0].rk[rank].b[i].dq[1],
@ -1592,7 +1592,7 @@ static u8 dramc_window_perbit_cal(u8 chn, u8 rank,
if (vref_scan_enable) if (vref_scan_enable)
dramc_set_vref(chn, rank, type, vref_dly.vref); dramc_set_vref(chn, rank, type, vref_dly.vref);
if ((type == RX_WIN_RD_DQC) || (type == RX_WIN_TEST_ENG)) { if (type == RX_WIN_RD_DQC || type == RX_WIN_TEST_ENG) {
dramc_set_rx_dly_factor(chn, rank, dramc_set_rx_dly_factor(chn, rank,
RX_DQM, FIRST_DQ_DELAY); RX_DQM, FIRST_DQ_DELAY);
dramc_set_rx_dly_factor(chn, rank, dramc_set_rx_dly_factor(chn, rank,
@ -1666,7 +1666,7 @@ static u8 dramc_window_perbit_cal(u8 chn, u8 rank,
if (vref_scan_enable) if (vref_scan_enable)
dramc_set_vref(chn, rank, type, vref_dly.vref); dramc_set_vref(chn, rank, type, vref_dly.vref);
if ((type == RX_WIN_RD_DQC) || (type == RX_WIN_TEST_ENG)) if (type == RX_WIN_RD_DQC || type == RX_WIN_TEST_ENG)
dramc_set_rx_best_dly(chn, rank, vref_dly.perbit_dly); dramc_set_rx_best_dly(chn, rank, vref_dly.perbit_dly);
else else
dramc_set_tx_best_dly(chn, rank, vref_dly.perbit_dly, dramc_set_tx_best_dly(chn, rank, vref_dly.perbit_dly,

4
src/soc/mediatek/mt8183/rtc.c
View File

@ -177,7 +177,7 @@ static u16 rtc_eosc_cali(void)
/* select 26M as target clock */ /* select 26M as target clock */
val = rtc_get_frequency_meter(middle, PMIC_FQMTR_CON0_FQM26M_CK, 0); val = rtc_get_frequency_meter(middle, PMIC_FQMTR_CON0_FQM26M_CK, 0);
if ((val >= RTC_FQMTR_LOW_BASE) && (val <= RTC_FQMTR_HIGH_BASE)) if (val >= RTC_FQMTR_LOW_BASE && val <= RTC_FQMTR_HIGH_BASE)
break; break;
if (val > RTC_FQMTR_HIGH_BASE) if (val > RTC_FQMTR_HIGH_BASE)
right = middle; right = middle;
@ -185,7 +185,7 @@ static u16 rtc_eosc_cali(void)
left = middle; left = middle;
} }
if ((val >= RTC_FQMTR_LOW_BASE) && (val <= RTC_FQMTR_HIGH_BASE)) if (val >= RTC_FQMTR_LOW_BASE && val <= RTC_FQMTR_HIGH_BASE)
return middle; return middle;
val = rtc_get_frequency_meter(left, PMIC_FQMTR_CON0_FQM26M_CK, 0); val = rtc_get_frequency_meter(left, PMIC_FQMTR_CON0_FQM26M_CK, 0);