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Following patch changes the K8M890 VGA handling. It reverts the framebuffer size 

to option based (similar what Uwe did) and also it uses GFXUMA to handle the
high_tables_start offset from memory top.

To satisfy the CMOS option users (Hi, libv!  ;)  I added also a possibility to do
that through CMOS.

Fixed printks to match the new style.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5494 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Rudolf Marek 2010-04-25 15:21:18 +00:00
parent 467a065384
commit a3c10acaac
3 changed files with 78 additions and 67 deletions
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9
src/mainboard/asus/m2v-mx_se/mainboard.c
View File

@ -24,6 +24,10 @@
#include <southbridge/via/k8t890/k8t890.h>
#include "chip.h"
#if CONFIG_GFXUMA
uint64_t uma_memory_base, uma_memory_size;
#endif
int add_mainboard_resources(struct lb_memory *mem)
{
device_t dev;
@ -38,6 +42,11 @@ int add_mainboard_resources(struct lb_memory *mem)
res->size);
}
#if (CONFIG_GFXUMA == 1)
lb_add_memory_range(mem, LB_MEM_RESERVED,
uma_memory_base, uma_memory_size);
#endif
#if CONFIG_HAVE_ACPI_RESUME == 1
lb_add_memory_range(mem, LB_MEM_RESERVED,
CONFIG_RAMBASE, ((CONFIG_RAMTOP) - CONFIG_RAMBASE));

33
src/southbridge/via/k8t890/Kconfig
View File

@ -1,3 +1,36 @@
config SOUTHBRIDGE_VIA_K8T890
bool
config SOUTHBRIDGE_VIA_K8T890_VGA_EN
bool "Enable onboard K8M890 graphics"
default y
depends on SOUTHBRIDGE_VIA_K8T890
select VGA
select GFXUMA
choice
prompt "Framebuffer size"
default K8M890_VIDEO_MB_32MB
depends on SOUTHBRIDGE_VIA_K8T890_VGA_EN
config K8M890_VIDEO_MB_32MB
bool "32MB"
config K8M890_VIDEO_MB_64MB
bool "64MB"
config K8M890_VIDEO_MB_128MB
bool "128MB"
config K8M890_VIDEO_MB_256MB
bool "256MB"
config K8M890_VIDEO_MB_CMOS
bool "Use CMOS option"
endchoice
config VIDEO_MB
int
default 32 if K8M890_VIDEO_MB_32MB
default 64 if K8M890_VIDEO_MB_64MB
default 128 if K8M890_VIDEO_MB_128MB
default 256 if K8M890_VIDEO_MB_256MB
default -1 if K8M890_VIDEO_MB_CMOS
depends on SOUTHBRIDGE_VIA_K8T890_VGA_EN

103
src/southbridge/via/k8t890/k8t890_dram.c
View File

@ -67,47 +67,44 @@ static void dram_enable(struct device *dev)
}
#if CONFIG_GFXUMA
extern uint64_t uma_memory_base, uma_memory_size;
#endif
static void dram_enable_k8m890(struct device *dev)
{
dram_enable(dev);
#if CONFIG_GFXUMA
msr_t msr;
int ret;
unsigned int fbbits;
/* use CMOS */
if (CONFIG_VIDEO_MB == -1) {
ret = get_option(&fbbits, "videoram_size");
if (ret) {
printk(BIOS_WARNING, "Failed to get videoram size (error %d), using default.\n", ret);
fbbits = 5;
}
if ((fbbits < 1) || (fbbits > 7)) {
printk(BIOS_WARNING, "Invalid videoram size (%d), using default.\n",
4 << fbbits);
fbbits = 5;
}
uma_memory_size = 4 << (fbbits + 20);
} else {
uma_memory_size = (CONFIG_VIDEO_MB << 20);
}
msr = rdmsr(TOP_MEM);
uma_memory_base = msr.lo - uma_memory_size;
printk(BIOS_INFO, "K8M890: UMA base is %llx size is %d (MB)\n", uma_memory_base, uma_memory_size / 1024 / 1024);
/* enable VGA, so the bridges gets VGA_EN and resources are set */
pci_write_config8(dev, 0xa1, 0x80);
}
static struct resource *resmax;
static void get_memres(void *gp, struct device *dev, struct resource *res)
{
unsigned int *fbsize = (unsigned int *) gp;
uint64_t proposed_base = res->base + res->size - *fbsize;
printk(BIOS_DEBUG, "get_memres: res->base=%llx res->size=%llx %d %d %d\n",
res->base, res->size, (res->size > *fbsize),
(!(proposed_base & (*fbsize - 1))),
(proposed_base < ((uint64_t) 0xffffffff)));
/* if we fit and also align OK, and must be below 4GB */
if ((res->size > *fbsize) && (!(proposed_base & (*fbsize - 1))) &&
(proposed_base < ((uint64_t) 0xffffffff) )) {
resmax = res;
}
#if CONFIG_WRITE_HIGH_TABLES==1
/* in arch/i386/boot/tables.c */
extern uint64_t high_tables_base, high_tables_size;
if ((high_tables_base) && ((high_tables_base > proposed_base) &&
(high_tables_base < (res->base + res->size)))) {
high_tables_base = proposed_base - high_tables_size;
printk(BIOS_DEBUG, "Moving the high_tables_base pointer to "
"new base %llx\n", high_tables_base);
}
#endif
dram_enable(dev);
}
/*
*
*/
int
k8m890_host_fb_size_get(void)
{
@ -125,57 +122,29 @@ k8m890_host_fb_size_get(void)
static void dram_init_fb(struct device *dev)
{
#if CONFIG_GFXUMA
/* Important bits:
* Enable the internal GFX bit 7 of reg 0xa1 plus in same reg:
* bits 6:4 X fbuffer size will be 2^(X+2) or 100 = 64MB, 101 = 128MB
* bits 3:0 BASE [31:28]
* reg 0xa0 bits 7:1 BASE [27:21] bit0 enable CPU access
*/
u8 tmp;
uint64_t proposed_base;
unsigned int fbbits = 0;
unsigned int fbsize;
u8 tmp;
int ret;
ret = get_option(&fbbits, "videoram_size");
if (ret) {
printk(BIOS_WARNING, "Failed to get videoram size (error %d), using default.\n", ret);
fbbits = 5;
}
if ((fbbits < 1) || (fbbits > 7)) {
printk(BIOS_WARNING, "Invalid videoram size (%d), using default.\n",
4 << fbbits);
fbbits = 5;
}
fbsize = 4 << (fbbits + 20);
resmax = NULL;
search_global_resources(
IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE,
get_memres, (void *) &fbsize);
/* no space for FB */
if (!resmax) {
printk(BIOS_ERR, "VIA FB: no space for framebuffer in RAM\n");
return;
}
proposed_base = resmax->base + resmax->size - fbsize;
resmax->size -= fbsize;
printk(BIOS_INFO, "K8M890: Using a %dMB framebuffer.\n", 4 << fbbits);
fbbits = ((log2(uma_memory_size >> 20) - 2) << 4);
printk(BIOS_INFO, "K8M890: Using a %dMB framebuffer.\n", (unsigned int) (uma_memory_size >> 20));
/* Step 1: enable UMA but no FB */
pci_write_config8(dev, 0xa1, 0x80);
/* Step 2: enough is just the FB size, the CPU accessible address is not needed */
tmp = (fbbits << 4) | 0x80;
tmp = fbbits | 0x80;
pci_write_config8(dev, 0xa1, tmp);
/* TODO K8 needs some UMA fine tuning too maybe call some generic routine here? */
#endif
}
static const struct device_operations dram_ops_t = {