Following patch changes the K8M890 VGA handling. It reverts the framebuffer size
to option based (similar what Uwe did) and also it uses GFXUMA to handle the high_tables_start offset from memory top. To satisfy the CMOS option users (Hi, libv! ;) I added also a possibility to do that through CMOS. Fixed printks to match the new style. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5494 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -24,6 +24,10 @@
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#include <southbridge/via/k8t890/k8t890.h>
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#include <southbridge/via/k8t890/k8t890.h>
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#include "chip.h"
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#include "chip.h"
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#if CONFIG_GFXUMA
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uint64_t uma_memory_base, uma_memory_size;
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#endif
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int add_mainboard_resources(struct lb_memory *mem)
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int add_mainboard_resources(struct lb_memory *mem)
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{
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{
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device_t dev;
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device_t dev;
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@ -38,6 +42,11 @@ int add_mainboard_resources(struct lb_memory *mem)
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res->size);
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res->size);
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}
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}
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#if (CONFIG_GFXUMA == 1)
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lb_add_memory_range(mem, LB_MEM_RESERVED,
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uma_memory_base, uma_memory_size);
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#endif
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#if CONFIG_HAVE_ACPI_RESUME == 1
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#if CONFIG_HAVE_ACPI_RESUME == 1
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lb_add_memory_range(mem, LB_MEM_RESERVED,
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lb_add_memory_range(mem, LB_MEM_RESERVED,
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CONFIG_RAMBASE, ((CONFIG_RAMTOP) - CONFIG_RAMBASE));
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CONFIG_RAMBASE, ((CONFIG_RAMTOP) - CONFIG_RAMBASE));
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@ -1,3 +1,36 @@
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config SOUTHBRIDGE_VIA_K8T890
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config SOUTHBRIDGE_VIA_K8T890
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bool
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bool
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config SOUTHBRIDGE_VIA_K8T890_VGA_EN
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bool "Enable onboard K8M890 graphics"
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default y
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depends on SOUTHBRIDGE_VIA_K8T890
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select VGA
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select GFXUMA
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choice
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prompt "Framebuffer size"
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default K8M890_VIDEO_MB_32MB
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depends on SOUTHBRIDGE_VIA_K8T890_VGA_EN
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config K8M890_VIDEO_MB_32MB
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bool "32MB"
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config K8M890_VIDEO_MB_64MB
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bool "64MB"
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config K8M890_VIDEO_MB_128MB
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bool "128MB"
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config K8M890_VIDEO_MB_256MB
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bool "256MB"
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config K8M890_VIDEO_MB_CMOS
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bool "Use CMOS option"
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endchoice
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config VIDEO_MB
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int
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default 32 if K8M890_VIDEO_MB_32MB
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default 64 if K8M890_VIDEO_MB_64MB
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default 128 if K8M890_VIDEO_MB_128MB
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default 256 if K8M890_VIDEO_MB_256MB
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default -1 if K8M890_VIDEO_MB_CMOS
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depends on SOUTHBRIDGE_VIA_K8T890_VGA_EN
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@ -67,47 +67,44 @@ static void dram_enable(struct device *dev)
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}
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}
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#if CONFIG_GFXUMA
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extern uint64_t uma_memory_base, uma_memory_size;
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#endif
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static void dram_enable_k8m890(struct device *dev)
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static void dram_enable_k8m890(struct device *dev)
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{
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{
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dram_enable(dev);
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#if CONFIG_GFXUMA
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msr_t msr;
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int ret;
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unsigned int fbbits;
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/* use CMOS */
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if (CONFIG_VIDEO_MB == -1) {
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ret = get_option(&fbbits, "videoram_size");
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if (ret) {
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printk(BIOS_WARNING, "Failed to get videoram size (error %d), using default.\n", ret);
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fbbits = 5;
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}
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if ((fbbits < 1) || (fbbits > 7)) {
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printk(BIOS_WARNING, "Invalid videoram size (%d), using default.\n",
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4 << fbbits);
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fbbits = 5;
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}
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uma_memory_size = 4 << (fbbits + 20);
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} else {
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uma_memory_size = (CONFIG_VIDEO_MB << 20);
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}
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msr = rdmsr(TOP_MEM);
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uma_memory_base = msr.lo - uma_memory_size;
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printk(BIOS_INFO, "K8M890: UMA base is %llx size is %d (MB)\n", uma_memory_base, uma_memory_size / 1024 / 1024);
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/* enable VGA, so the bridges gets VGA_EN and resources are set */
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/* enable VGA, so the bridges gets VGA_EN and resources are set */
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pci_write_config8(dev, 0xa1, 0x80);
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pci_write_config8(dev, 0xa1, 0x80);
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}
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static struct resource *resmax;
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static void get_memres(void *gp, struct device *dev, struct resource *res)
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{
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unsigned int *fbsize = (unsigned int *) gp;
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uint64_t proposed_base = res->base + res->size - *fbsize;
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printk(BIOS_DEBUG, "get_memres: res->base=%llx res->size=%llx %d %d %d\n",
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res->base, res->size, (res->size > *fbsize),
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(!(proposed_base & (*fbsize - 1))),
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(proposed_base < ((uint64_t) 0xffffffff)));
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/* if we fit and also align OK, and must be below 4GB */
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if ((res->size > *fbsize) && (!(proposed_base & (*fbsize - 1))) &&
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(proposed_base < ((uint64_t) 0xffffffff) )) {
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resmax = res;
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}
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#if CONFIG_WRITE_HIGH_TABLES==1
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/* in arch/i386/boot/tables.c */
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extern uint64_t high_tables_base, high_tables_size;
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if ((high_tables_base) && ((high_tables_base > proposed_base) &&
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(high_tables_base < (res->base + res->size)))) {
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high_tables_base = proposed_base - high_tables_size;
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printk(BIOS_DEBUG, "Moving the high_tables_base pointer to "
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"new base %llx\n", high_tables_base);
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}
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#endif
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#endif
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dram_enable(dev);
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}
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}
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/*
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*
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*/
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int
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int
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k8m890_host_fb_size_get(void)
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k8m890_host_fb_size_get(void)
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{
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{
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@ -125,57 +122,29 @@ k8m890_host_fb_size_get(void)
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static void dram_init_fb(struct device *dev)
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static void dram_init_fb(struct device *dev)
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{
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{
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#if CONFIG_GFXUMA
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/* Important bits:
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/* Important bits:
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* Enable the internal GFX bit 7 of reg 0xa1 plus in same reg:
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* Enable the internal GFX bit 7 of reg 0xa1 plus in same reg:
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* bits 6:4 X fbuffer size will be 2^(X+2) or 100 = 64MB, 101 = 128MB
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* bits 6:4 X fbuffer size will be 2^(X+2) or 100 = 64MB, 101 = 128MB
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* bits 3:0 BASE [31:28]
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* bits 3:0 BASE [31:28]
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* reg 0xa0 bits 7:1 BASE [27:21] bit0 enable CPU access
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* reg 0xa0 bits 7:1 BASE [27:21] bit0 enable CPU access
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*/
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*/
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u8 tmp;
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uint64_t proposed_base;
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unsigned int fbbits = 0;
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unsigned int fbbits = 0;
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unsigned int fbsize;
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u8 tmp;
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int ret;
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int ret;
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fbbits = ((log2(uma_memory_size >> 20) - 2) << 4);
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ret = get_option(&fbbits, "videoram_size");
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printk(BIOS_INFO, "K8M890: Using a %dMB framebuffer.\n", (unsigned int) (uma_memory_size >> 20));
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if (ret) {
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printk(BIOS_WARNING, "Failed to get videoram size (error %d), using default.\n", ret);
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fbbits = 5;
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}
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if ((fbbits < 1) || (fbbits > 7)) {
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printk(BIOS_WARNING, "Invalid videoram size (%d), using default.\n",
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4 << fbbits);
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fbbits = 5;
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}
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fbsize = 4 << (fbbits + 20);
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resmax = NULL;
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search_global_resources(
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IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE,
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get_memres, (void *) &fbsize);
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/* no space for FB */
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if (!resmax) {
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printk(BIOS_ERR, "VIA FB: no space for framebuffer in RAM\n");
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return;
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}
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proposed_base = resmax->base + resmax->size - fbsize;
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resmax->size -= fbsize;
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printk(BIOS_INFO, "K8M890: Using a %dMB framebuffer.\n", 4 << fbbits);
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/* Step 1: enable UMA but no FB */
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/* Step 1: enable UMA but no FB */
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pci_write_config8(dev, 0xa1, 0x80);
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pci_write_config8(dev, 0xa1, 0x80);
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/* Step 2: enough is just the FB size, the CPU accessible address is not needed */
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/* Step 2: enough is just the FB size, the CPU accessible address is not needed */
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tmp = (fbbits << 4) | 0x80;
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tmp = fbbits | 0x80;
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pci_write_config8(dev, 0xa1, tmp);
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pci_write_config8(dev, 0xa1, tmp);
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/* TODO K8 needs some UMA fine tuning too maybe call some generic routine here? */
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/* TODO K8 needs some UMA fine tuning too maybe call some generic routine here? */
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#endif
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}
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}
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static const struct device_operations dram_ops_t = {
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static const struct device_operations dram_ops_t = {
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