cpu/amd/{agesa,pi}/Kconfig: select SSE2

SSE2 instructions are supported by family14 and newer.

SSE will be automatically enabled in bootblock_crt0 for platforms that
migrate to C bootblock. Because of that family specific CAR setup may
avoid additional code.

TEST=boot PC Engines apu1 and apu2

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I19f1793112439f0c706ebb066f9807364ad8c5a7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37292
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Michał Żygowski 2019-11-27 22:29:44 +01:00 committed by Patrick Georgi
parent f3db2aea85
commit a3ce27d3dd
2 changed files with 2 additions and 0 deletions

View File

@ -29,6 +29,7 @@ config CPU_AMD_AGESA
select CBMEM_STAGE_CACHE if HAVE_ACPI_RESUME
select SMM_ASEG
select NO_FIXED_XIP_ROM_SIZE
select SSE2
if CPU_AMD_AGESA

View File

@ -28,6 +28,7 @@ config CPU_AMD_PI
select SPI_FLASH if HAVE_ACPI_RESUME
select SMM_ASEG
select NO_FIXED_XIP_ROM_SIZE
select SSE2
if CPU_AMD_PI