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nb/intel/i440bx, mb/asus/p3b-f: Abolish disable_spd() 

This hook is specifically for asus/p3b-f so its mainboard code has
a chance to put SPD away after RAM init completes. What it intends
to do is done when GPO gets programmed in ramstage (and it's safe
to do so), and no other board needs this hook, so drop it.

Change-Id: Ib7874b4d2b69fdaa5f3c5a3421a62a629c4154a4
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73951
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Keith Hui 2023-03-23 01:11:44 -04:00 committed by Lean Sheng Tan
parent f97598f22f
commit a491f2fa45
3 changed files with 0 additions and 12 deletions
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9
src/mainboard/asus/p2b/variants/p3b-f/romstage.c
View File

@ -25,12 +25,3 @@ void enable_spd(void)
{
outb(0x6f, PM_IO_BASE + 0x37);
}
/*
* Disable SPD access after RAM init to allow access to SMBus/I2C offsets
* 0x48/0x49/0x2d, which is required e.g. by lm-sensors.
*/
void disable_spd(void)
{
outb(0x67, PM_IO_BASE + 0x37);
}

2
src/northbridge/intel/i440bx/raminit.c
View File

@ -1001,7 +1001,6 @@ static void sdram_enable(void)
/* Implemented under mainboard. */
void __weak enable_spd(void) { }
void __weak disable_spd(void) { }
void sdram_initialize(int s3resume)
{
@ -1013,6 +1012,5 @@ void sdram_initialize(int s3resume)
sdram_set_spd_registers();
sdram_enable();
disable_spd();
timestamp_add_now(TS_INITRAM_END);
}

1
src/northbridge/intel/i440bx/raminit.h
View File

@ -13,7 +13,6 @@
#define DIMM3 0x53
void enable_spd(void);
void disable_spd(void);
void sdram_initialize(int s3resume);
/* Debug */