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qemu: fix ioapic reservation 

The slightly hackish ioapic ressource reservation is needed for i440fx
emulation only, for q35 the ich9 southbridge driver handles this just
fine.

[ Side note: The i440fx chipset emulated by qemu is pimped up with alot
             of stuff which never existed on real hardware, which leads
             to tweaks like this one. ]

Change-Id: I06bf54cbc247ccf17aa9063fb7dee9def323c605
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-on: http://review.coreboot.org/3850
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Gerd Hoffmann 2013-08-09 10:02:22 +02:00 committed by Patrick Georgi
parent 1e1a1798fa
commit a4e70578db
1 changed files with 14 additions and 8 deletions
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14
src/mainboard/emulation/qemu-i440fx/northbridge.c
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@ -52,6 +52,9 @@ static void cpu_pci_domain_set_resources(device_t dev)
static void cpu_pci_domain_read_resources(struct device *dev)
{
u16 nbid = pci_read_config16(dev_find_slot(0, 0), PCI_DEVICE_ID);
int i440fx = (nbid == 0x1237);
// int q35 = (nbid == 0x29c0);
struct resource *res;
unsigned long tomk = 0, high;
int idx = 10;
@ -89,14 +92,17 @@ static void cpu_pci_domain_read_resources(struct device *dev)
high_tables_size = HIGH_MEMORY_SIZE;
#endif
/* Reserve space for the IOAPIC. This should be in the Southbridge,
* but I couldn't tell which device to put it in. */
if (i440fx) {
/* Reserve space for the IOAPIC. This should be in
* the Southbridge, but I couldn't tell which device
* to put it in. */
res = new_resource(dev, 2);
res->base = IO_APIC_ADDR;
res->size = 0x100000UL;
res->limit = 0xffffffffUL;
res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_STORED |
IORESOURCE_ASSIGNED;
res->flags = IORESOURCE_MEM | IORESOURCE_FIXED |
IORESOURCE_STORED | IORESOURCE_ASSIGNED;
}
/* Reserve space for the LAPIC. There's one in every processor, but
* the space only needs to be reserved once, so we do it here. */