qemu: fix ioapic reservation
The slightly hackish ioapic ressource reservation is needed for i440fx emulation only, for q35 the ich9 southbridge driver handles this just fine. [ Side note: The i440fx chipset emulated by qemu is pimped up with alot of stuff which never existed on real hardware, which leads to tweaks like this one. ] Change-Id: I06bf54cbc247ccf17aa9063fb7dee9def323c605 Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-on: http://review.coreboot.org/3850 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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@ -52,6 +52,9 @@ static void cpu_pci_domain_set_resources(device_t dev)
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static void cpu_pci_domain_read_resources(struct device *dev)
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{
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u16 nbid = pci_read_config16(dev_find_slot(0, 0), PCI_DEVICE_ID);
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int i440fx = (nbid == 0x1237);
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// int q35 = (nbid == 0x29c0);
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struct resource *res;
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unsigned long tomk = 0, high;
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int idx = 10;
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@ -89,14 +92,17 @@ static void cpu_pci_domain_read_resources(struct device *dev)
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high_tables_size = HIGH_MEMORY_SIZE;
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#endif
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/* Reserve space for the IOAPIC. This should be in the Southbridge,
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* but I couldn't tell which device to put it in. */
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res = new_resource(dev, 2);
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res->base = IO_APIC_ADDR;
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res->size = 0x100000UL;
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res->limit = 0xffffffffUL;
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res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_STORED |
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IORESOURCE_ASSIGNED;
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if (i440fx) {
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/* Reserve space for the IOAPIC. This should be in
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* the Southbridge, but I couldn't tell which device
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* to put it in. */
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res = new_resource(dev, 2);
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res->base = IO_APIC_ADDR;
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res->size = 0x100000UL;
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res->limit = 0xffffffffUL;
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res->flags = IORESOURCE_MEM | IORESOURCE_FIXED |
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IORESOURCE_STORED | IORESOURCE_ASSIGNED;
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}
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/* Reserve space for the LAPIC. There's one in every processor, but
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* the space only needs to be reserved once, so we do it here. */
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