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mb/google/volteer: Disable WWAN PCIe 

Disable WWAN PCIe to allow WWAN enumerate as USB on Volteer.

BUG=b:146226689
BRANCH=none
TEST=lsusb shows WWAN device

Change-Id: I04e49e3ec989d20ea3469fce06051c475b0ed0c8
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39421
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Alex Levin 2020-03-09 16:52:59 -07:00 committed by Patrick Georgi
parent 0965044c99
commit a53dbd4780
2 changed files with 3 additions and 7 deletions
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8
src/mainboard/google/volteer/variants/baseboard/devicetree.cb
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@ -56,12 +56,8 @@ chip soc/intel/tigerlake
register "PcieClkSrcUsage[1]" = "6" register "PcieClkSrcUsage[1]" = "6"
register "PcieClkSrcClkReq[1]" = "1" register "PcieClkSrcClkReq[1]" = "1"
# Enable WWAN PCIE 6 using clk 2
register "PcieRpEnable[5]" = "1"
register "PcieClkSrcUsage[2]" = "5"
register "PcieClkSrcClkReq[2]" = "2"
# Mark SRCCLKREQ pins as unused that are routed for a Non-Clkreq functionality # Mark SRCCLKREQ pins as unused that are routed for a Non-Clkreq functionality
register "PcieClkSrcUsage[2]" = "0xFF"
register "PcieClkSrcUsage[4]" = "0xFF" register "PcieClkSrcUsage[4]" = "0xFF"
register "PcieClkSrcUsage[5]" = "0xFF" register "PcieClkSrcUsage[5]" = "0xFF"
register "PcieClkSrcUsage[6]" = "0xFF" register "PcieClkSrcUsage[6]" = "0xFF"
@ -309,7 +305,7 @@ chip soc/intel/tigerlake
device pci 1c.2 off end # RP3 0xA0BA device pci 1c.2 off end # RP3 0xA0BA
device pci 1c.3 off end # RP4 0xA0BB device pci 1c.3 off end # RP4 0xA0BB
device pci 1c.4 off end # RP5 0xA0BC device pci 1c.4 off end # RP5 0xA0BC
device pci 1c.5 on end # WWAN RP6 0xA0BD device pci 1c.5 off end # WWAN RP6 0xA0BD
device pci 1c.6 on end # RP7 0xA0BE device pci 1c.6 on end # RP7 0xA0BE
device pci 1c.7 on end # SD Card RP8 0xA0BF device pci 1c.7 on end # SD Card RP8 0xA0BF

2
src/mainboard/google/volteer/variants/baseboard/gpio.c
View File

@ -170,7 +170,7 @@ static const struct pad_config gpio_table[] = {
/* D6 : SRCCLKREQ1# ==> WLAN_CLKREQ_ODL */ /* D6 : SRCCLKREQ1# ==> WLAN_CLKREQ_ODL */
PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1), PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1),
/* D7 : SRCCLKREQ2# ==> WWAN_CLKREQ_ODL */ /* D7 : SRCCLKREQ2# ==> WWAN_CLKREQ_ODL */
PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1), PAD_NC(GPP_D7, NONE),
/* D8 : SRCCLKREQ3# ==> SD_CLKREQ_ODL */ /* D8 : SRCCLKREQ3# ==> SD_CLKREQ_ODL */
PAD_CFG_NF(GPP_D8, NONE, DEEP, NF1), PAD_CFG_NF(GPP_D8, NONE, DEEP, NF1),
/* D9 : ISH_SPI_CS# ==> PCH_GSPI2_CVF_CS_L */ /* D9 : ISH_SPI_CS# ==> PCH_GSPI2_CVF_CS_L */