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drivers/intel/fsp1_1: Enable builds without MRC cache 

Properly use the CONFIG_CACHE_MRC_SETTINGS value to determine when to
cache the MRC settings.

TEST=Build and run on Galileo

Change-Id: Ibc76b20b9603b1e436a68b71d44ca1ca04db7168
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13437
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Lee Leahy 2016-01-05 16:34:58 -08:00 committed by Leroy P Leahy
parent 4b7a00867a
commit a608969ebb
1 changed files with 14 additions and 13 deletions
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19
src/drivers/intel/fsp1_1/romstage.c
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@ -2,7 +2,7 @@
* This file is part of the coreboot project. * This file is part of the coreboot project.
* *
* Copyright (C) 2014 Google Inc. * Copyright (C) 2014 Google Inc.
* Copyright (C) 2015 Intel Corporation. * Copyright (C) 2015-2016 Intel Corporation.
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@ -128,8 +128,9 @@ void romstage_common(struct romstage_params *params)
/* Recovery mode does not use MRC cache */ /* Recovery mode does not use MRC cache */
printk(BIOS_DEBUG, printk(BIOS_DEBUG,
"Recovery mode: not using MRC cache.\n"); "Recovery mode: not using MRC cache.\n");
} else if (!mrc_cache_get_current_with_version(&cache, } else if (IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS)
params->fsp_version)) { && (!mrc_cache_get_current_with_version(&cache,
params->fsp_version))) {
/* MRC cache found */ /* MRC cache found */
params->pei_data->saved_data_size = cache->size; params->pei_data->saved_data_size = cache->size;
params->pei_data->saved_data = &cache->data[0]; params->pei_data->saved_data = &cache->data[0];
@ -150,17 +151,17 @@ void romstage_common(struct romstage_params *params)
timestamp_add_now(TS_AFTER_INITRAM); timestamp_add_now(TS_AFTER_INITRAM);
/* Save MRC output */ /* Save MRC output */
printk(BIOS_DEBUG, "MRC data at %p %d bytes\n", pei_data->data_to_save, if (IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS)) {
pei_data->data_to_save_size); printk(BIOS_DEBUG, "MRC data at %p %d bytes\n",
if (params->pei_data->boot_mode != SLEEP_STATE_S3) { pei_data->data_to_save, pei_data->data_to_save_size);
if (params->pei_data->data_to_save_size != 0 && if ((params->pei_data->boot_mode != SLEEP_STATE_S3)
params->pei_data->data_to_save != NULL) { && (params->pei_data->data_to_save_size != 0)
&& (params->pei_data->data_to_save != NULL))
mrc_cache_stash_data_with_version( mrc_cache_stash_data_with_version(
params->pei_data->data_to_save, params->pei_data->data_to_save,
params->pei_data->data_to_save_size, params->pei_data->data_to_save_size,
params->fsp_version); params->fsp_version);
} }
}
/* Save DIMM information */ /* Save DIMM information */
mainboard_save_dimm_info(params); mainboard_save_dimm_info(params);