simpler irq tables
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1338 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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#include <arch/pirq_routing.h>
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#include <device/pci.h>
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#define IRQ_ROUTER_BUS 1
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#define IRQ_ROUTER_DEVFN PCI_DEVFN(4,3)
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#define IRQ_ROUTER_VENDOR 0x1022
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#define IRQ_ROUTER_DEVICE 0x746b
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#define AVAILABLE_IRQS 0xdef8
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#define IRQ_SLOT(slot, bus, dev, fn, linka, linkb, linkc, linkd) \
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{ bus, (dev<<3)|fn, {{ linka, AVAILABLE_IRQS}, { linkb, AVAILABLE_IRQS}, \
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{linkc, AVAILABLE_IRQS}, {linkd, AVAILABLE_IRQS}}, slot, 0}
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/* Each IRQ_SLOT entry consists of:
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* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu
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*/
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const struct irq_routing_table intel_irq_routing_table = {
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PIRQ_SIGNATURE, /* u32 signature */
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PIRQ_VERSION, /* u16 version */
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32+16*IRQ_SLOT_COUNT,/* there can be total
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* IRQ_SLOT_COUNT devices on the bus */
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1, /* Where the interrupt router lies (bus) */
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(4<<3)|3, /* Where the interrupt router lies (dev) */
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0x0, /* IRQs devoted exclusively to PCI usage */
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0x1022, /* Vendor */
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0x746b, /* Device */
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0, /* Crap (miniport) */
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{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
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0xb0, /* u8 checksum , mod 256 checksum must give zero */
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{ /* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
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/* PCI Slot 1 */
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{0x03, (0x01<<3)|0, {{0x02, 0xdef8}, {0x03, 0xdef8}, {0x04, 0xdef8}, {0x01, 0xdef8}}, 0x01, 0},
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/* PCI Slot 2 */
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{0x03, (0x02<<3)|0, {{0x03, 0xdef8}, {0x04, 0xdef8}, {0x01, 0xdef8}, {0x02, 0xdef8}}, 0x02, 0},
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/* PCI Slot 3 */
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{0x02, (0x01<<3)|0, {{0x02, 0xdef8}, {0x03, 0xdef8}, {0x04, 0xdef8}, {0x01, 0xdef8}}, 0x03, 0},
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/* PCI Slot 4 */
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{0x02, (0x02<<3)|0, {{0x03, 0xdef8}, {0x04, 0xdef8}, {0x01, 0xdef8}, {0x02, 0xdef8}}, 0x04, 0},
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/* PCI Slot 5 */
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{0x04, (0x05<<3)|0, {{0x02, 0xdef8}, {0x03, 0xdef8}, {0x04, 0xdef8}, {0x01, 0xdef8}}, 0x05, 0},
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/* PCI Slot 6 */
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{0x04, (0x04<<3)|0, {{0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0xdef8}, {0x04, 0xdef8}}, 0x06, 0},
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/* Onboard NICS */
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{0x02, (0x03<<3)|0, {{0x04, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}}, 0x00, 0},
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{0x02, (0x04<<3)|0, {{0x04, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}}, 0x00, 0},
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PIRQ_SIGNATURE, /* u32 signature */
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PIRQ_VERSION, /* u16 version */
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32+16*IRQ_SLOT_COUNT, /* there can be total IRQ_SLOT_COUNT
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* devices on the bus */
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IRQ_ROUTER_BUS, /* Where the interrupt router lies (bus) */
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IRQ_ROUTER_DEVFN, /* Where the interrupt router lies (dev) */
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0x00, /* IRQs devoted exclusively to PCI usage */
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IRQ_ROUTER_VENDOR, /* Vendor */
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IRQ_ROUTER_DEVICE, /* Device */
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0x00, /* Crap (miniport) */
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{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
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0x00, /* u8 checksum , mod 256 checksum must give
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* zero, will be corrected later
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*/
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{
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/* slot(0=onboard), devfn, irqlinks (line id, 0=not routed) */
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/* PCI Slot 1-6 */
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IRQ_SLOT (1, 3,1,0, 2,3,4,1 ),
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IRQ_SLOT (2, 3,2,0, 3,4,1,2 ),
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IRQ_SLOT (3, 2,1,0, 2,3,4,1 ),
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IRQ_SLOT (4, 2,2,0, 3,4,1,2 ),
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IRQ_SLOT (5, 4,5,0, 2,3,4,1 ),
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IRQ_SLOT (6, 4,4,0, 1,2,3,4 ),
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/* Onboard NICs */
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IRQ_SLOT (0, 2,3,0, 4,0,0,0 ),
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IRQ_SLOT (0, 2,4,0, 4,0,0,0 ),
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/* Let Linux know about bus 1 */
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{0x01, (0x04<<3)|3, {{0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}}, 0x00, 0},
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IRQ_SLOT (0, 1,4,3, 0,0,0,0 ),
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}
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};
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