sb/intel/bd8x62x,i82801gx: Fix PCI bridge subsystem IDs
Implementation of ich_pci_dev_enable_resources() used to have a custom implementation to program PCI subsystem IDs for the (legacy) PCI bus bridge. With the local implementation removed, we no longer need the custom .enable_resources callback. Change-Id: I6f73fd0e4d5a1829d1555455c9a143f1d18a6116 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35673 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Petr Cvek <petrcvekcz@gmail.com>
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@ -57,34 +57,6 @@ static void pci_init(struct device *dev)
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pci_write_config16(dev, SECSTS, reg16);
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}
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static void ich_pci_dev_enable_resources(struct device *dev)
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{
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uint16_t command;
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command = pci_read_config16(dev, PCI_COMMAND);
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command |= dev->command;
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printk(BIOS_DEBUG, "%s cmd <- %02x\n", dev_path(dev), command);
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pci_write_config16(dev, PCI_COMMAND, command);
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}
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static void ich_pci_bus_enable_resources(struct device *dev)
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{
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uint16_t ctrl;
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/* enable IO in command register if there is VGA card
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* connected with (even it does not claim IO resource)
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*/
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if (dev->link_list->bridge_ctrl & PCI_BRIDGE_CTL_VGA)
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dev->command |= PCI_COMMAND_IO;
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ctrl = pci_read_config16(dev, PCI_BRIDGE_CONTROL);
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ctrl |= dev->link_list->bridge_ctrl;
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ctrl |= (PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR); /* error check */
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printk(BIOS_DEBUG, "%s bridge ctrl <- %04x\n", dev_path(dev), ctrl);
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pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl);
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/* This is the reason we need our own pci_bus_enable_resources */
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ich_pci_dev_enable_resources(dev);
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}
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static struct pci_operations pci_ops = {
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.set_subsystem = pci_dev_set_subsystem,
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};
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@ -92,7 +64,7 @@ static struct pci_operations pci_ops = {
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static struct device_operations device_ops = {
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.read_resources = pci_bus_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = ich_pci_bus_enable_resources,
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.enable_resources = pci_bus_enable_resources,
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.init = pci_init,
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.scan_bus = pci_scan_bridge,
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.ops_pci = &pci_ops,
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@ -56,34 +56,6 @@ static void pci_init(struct device *dev)
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pci_write_config16(dev, SECSTS, reg16);
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}
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static void ich_pci_dev_enable_resources(struct device *dev)
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{
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uint16_t command;
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command = pci_read_config16(dev, PCI_COMMAND);
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command |= dev->command;
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printk(BIOS_DEBUG, "%s cmd <- %02x\n", dev_path(dev), command);
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pci_write_config16(dev, PCI_COMMAND, command);
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}
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static void ich_pci_bus_enable_resources(struct device *dev)
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{
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uint16_t ctrl;
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/* enable IO in command register if there is VGA card
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* connected with (even it does not claim IO resource)
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*/
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if (dev->link_list->bridge_ctrl & PCI_BRIDGE_CTL_VGA)
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dev->command |= PCI_COMMAND_IO;
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ctrl = pci_read_config16(dev, PCI_BRIDGE_CONTROL);
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ctrl |= dev->link_list->bridge_ctrl;
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ctrl |= (PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR); /* error check */
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printk(BIOS_DEBUG, "%s bridge ctrl <- %04x\n", dev_path(dev), ctrl);
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pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl);
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/* This is the reason we need our own pci_bus_enable_resources */
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ich_pci_dev_enable_resources(dev);
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}
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static struct pci_operations pci_ops = {
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.set_subsystem = pci_dev_set_subsystem,
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};
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@ -91,7 +63,7 @@ static struct pci_operations pci_ops = {
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static struct device_operations device_ops = {
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.read_resources = pci_bus_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = ich_pci_bus_enable_resources,
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.enable_resources = pci_bus_enable_resources,
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.init = pci_init,
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.scan_bus = pci_scan_bridge,
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.ops_pci = &pci_ops,
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