drivers/intel/dptf: Add new thermal control mechanism for pch device
Add new thermal control mechanism for pch device under dptf driver. This provides support of different control knobs for FIVR. BUG=b:198582766 BRANCH=None TEST=Build FW and test on brya0 board Change-Id: I035d2844b9ba6a9532ae006fc1c43e34cb94328a Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57096 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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@ -5,3 +5,10 @@ config DRIVERS_INTEL_DPTF
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help
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help
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When enabled, entries in the devicetree are used to generate
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When enabled, entries in the devicetree are used to generate
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Intel DPTF Tables at runtime in the SSDT.
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Intel DPTF Tables at runtime in the SSDT.
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config DRIVERS_INTEL_DPTF_SUPPORTS_TPCH
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def_bool n
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depends on HAVE_ACPI_TABLES && PMC_IPC_ACPI_INTERFACE
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help
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When enabled, chip driver/intel/dptf will publish information to the
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SSDT for the TPCH device.
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@ -4,6 +4,7 @@
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#include <acpi/acpigen_pci.h>
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#include <acpi/acpigen_pci.h>
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#include <console/console.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <device/device.h>
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#include <intelblocks/pmc_ipc.h>
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#include "chip.h"
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#include "chip.h"
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#include "dptf.h"
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#include "dptf.h"
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@ -194,7 +195,50 @@ static void write_generic_devices(const struct drivers_intel_dptf_config *config
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}
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}
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}
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}
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/* \_SB.DPTF - note: leaves the Scope open for child devices*/
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/* \_SB.DPTF.TPCH.RFC methods */
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static void write_tpch_rfc_methods(const char *tpch_rfc_method_name,
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unsigned int ipc_subcmd_ctrl_value)
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{
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acpigen_write_method_serialized(tpch_rfc_method_name, 1);
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acpigen_emit_namestring("IPCS");
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acpigen_write_integer(PMC_IPC_CMD_COMMAND_FIVR);
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acpigen_write_integer(PMC_IPC_CMD_CMD_ID_FIVR_WRITE);
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acpigen_write_integer(0x8);
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acpigen_write_integer(ipc_subcmd_ctrl_value);
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acpigen_emit_byte(ARG0_OP);
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acpigen_write_dword(0);
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acpigen_write_dword(0);
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/* The reason for returning a value here is a W/A for the ESIF shell */
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acpigen_emit_byte(RETURN_OP);
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acpigen_write_package(0);
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acpigen_write_package_end();
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acpigen_write_method_end();
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}
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static void write_create_tpch(const struct dptf_platform_info *platform_info)
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{
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acpigen_write_device("TPCH");
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acpigen_write_name("_HID");
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dptf_write_hid(platform_info->use_eisa_hids, platform_info->tpch_device_hid);
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acpigen_write_name_integer("_UID", 0);
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acpigen_write_STA(ACPI_STATUS_DEVICE_ALL_ON);
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}
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static void write_tpch_methods(const struct dptf_platform_info *platform_info)
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{
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write_create_tpch(platform_info);
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/* Create RFC0 method */
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write_tpch_rfc_methods(platform_info->tpch_rfc0_method,
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PMC_IPC_SUBCMD_RFI_CTRL0_LOGIC);
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/* Create RFC1 method */
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write_tpch_rfc_methods(platform_info->tpch_rfc1_method,
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PMC_IPC_SUBCMD_RFI_CTRL4_LOGIC);
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acpigen_write_device_end(); /* TPCH Device */
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}
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/* \_SB.DPTF - note: leaves the Scope open for child devices */
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static void write_open_dptf_device(const struct device *dev,
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static void write_open_dptf_device(const struct device *dev,
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const struct dptf_platform_info *platform_info)
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const struct dptf_platform_info *platform_info)
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{
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{
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@ -229,6 +273,9 @@ static void write_device_definitions(const struct device *dev)
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write_imok();
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write_imok();
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write_generic_devices(config, platform_info);
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write_generic_devices(config, platform_info);
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if (CONFIG(DRIVERS_INTEL_DPTF_SUPPORTS_TPCH))
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write_tpch_methods(platform_info);
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acpigen_pop_len(); /* DPTF Device (write_open_dptf_device) */
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acpigen_pop_len(); /* DPTF Device (write_open_dptf_device) */
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acpigen_pop_len(); /* Scope */
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acpigen_pop_len(); /* Scope */
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}
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}
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@ -14,6 +14,9 @@ struct dptf_platform_info {
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const char *dptf_device_hid;
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const char *dptf_device_hid;
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const char *generic_hid;
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const char *generic_hid;
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const char *fan_hid;
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const char *fan_hid;
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const char *tpch_device_hid;
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const char *tpch_rfc0_method;
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const char *tpch_rfc1_method;
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};
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};
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const struct dptf_platform_info *get_dptf_platform_info(void);
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const struct dptf_platform_info *get_dptf_platform_info(void);
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