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cpu/intel/model_6?x{slot_1}: Leave enabling CONFIG_SMP to the mainboard 

These predate hyperthreading so they are not SMP capable unless installed
in a SMP board. Turning SMP off shaves 128 compressed bytes from
ramstage.

Change-Id: I114bdc83ed40ccd9d3996aabf77422236d9d12fa
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37627
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Keith Hui 2019-12-09 20:25:16 -05:00 committed by Nico Huber
parent 39e1f44f33
commit a988091d39
5 changed files with 0 additions and 5 deletions
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1
src/cpu/intel/model_65x/Kconfig
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@ -4,5 +4,4 @@ config CPU_INTEL_MODEL_65X
select ARCH_VERSTAGE_X86_32
select ARCH_ROMSTAGE_X86_32
select ARCH_RAMSTAGE_X86_32
select SMP
select SUPPORT_CPU_UCODE_IN_CBFS

1
src/cpu/intel/model_67x/Kconfig
View File

@ -4,5 +4,4 @@ config CPU_INTEL_MODEL_67X
select ARCH_VERSTAGE_X86_32
select ARCH_ROMSTAGE_X86_32
select ARCH_RAMSTAGE_X86_32
select SMP
select SUPPORT_CPU_UCODE_IN_CBFS

1
src/cpu/intel/model_68x/Kconfig
View File

@ -18,5 +18,4 @@ config CPU_INTEL_MODEL_68X
select ARCH_VERSTAGE_X86_32
select ARCH_ROMSTAGE_X86_32
select ARCH_RAMSTAGE_X86_32
select SMP
select SUPPORT_CPU_UCODE_IN_CBFS

1
src/cpu/intel/model_6bx/Kconfig
View File

@ -4,5 +4,4 @@ config CPU_INTEL_MODEL_6BX
select ARCH_VERSTAGE_X86_32
select ARCH_ROMSTAGE_X86_32
select ARCH_RAMSTAGE_X86_32
select SMP
select SUPPORT_CPU_UCODE_IN_CBFS

1
src/cpu/intel/model_6xx/Kconfig
View File

@ -4,5 +4,4 @@ config CPU_INTEL_MODEL_6XX
select ARCH_VERSTAGE_X86_32
select ARCH_ROMSTAGE_X86_32
select ARCH_RAMSTAGE_X86_32
select SMP
select SUPPORT_CPU_UCODE_IN_CBFS