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AMD f16kb: use AZ_PIN in Kconfig to customize AZALIA_PIN in Yangtze 

src/southbridge/amd/agesa/hudson/Kconfig config default value,
mainboard Kconfig config value for specific mainboard.
bit 1,0 - pin 0
bit 3,2 - pin 1
bit 5,4 - pin 2
bit 7,6 - pin 3

Change-Id: I54a87cf734685515a3e1850838ca7d94387172ce
Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com>
Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com>
Reviewed-on: http://review.coreboot.org/3879
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
This commit is contained in:
WANG Siyuan 2013-08-21 10:06:25 +08:00 committed by Bruce Griffith
parent 9090ff91e1
commit a9b01d1347
2 changed files with 13 additions and 4 deletions
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9
src/southbridge/amd/agesa/hudson/Kconfig
View File

@ -247,4 +247,13 @@ if SOUTHBRIDGE_AMD_AGESA_YANGTZE
config AMD_SB_SPI_TX_LEN
int
default 64
config AZ_PIN
hex
default 0xaa
help
bit 1,0 - pin 0
bit 3,2 - pin 1
bit 5,4 - pin 2
bit 7,6 - pin 3
endif

8
src/vendorcode/amd/agesa/f16kb/Proc/Fch/Interface/Family/Yangtze/EnvDefYangtze.c
View File

@ -266,10 +266,10 @@ FCH_DATA_BLOCK InitEnvCfgDefault = {
0, // AzaliaSnoop
0, // AzaliaDummy
{ // AZALIA_PIN
2, // AzaliaSdin0
2, // AzaliaSdin1
2, // AzaliaSdin2
2, // AzaliaSdin3
CONFIG_AZ_PIN & 0x3, // AzaliaSdin0
(CONFIG_AZ_PIN & 0xc) >> 2, // AzaliaSdin1
(CONFIG_AZ_PIN & 0x30) >> 4, // AzaliaSdin2
(CONFIG_AZ_PIN & 0xc0) >> 6, // AzaliaSdin3
},
NULL, // *AzaliaOemCodecTablePtr
NULL, // *AzaliaOemFpCodecTablePtr