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hp/dl145_g1: Adding FID/VID and Powernow ACPI 

Add cool-n-quiet functionality which allows the OS to dynamic
alter CPU voltage and frequency change in order to save power
e.g. when the CPU load is low.

Change-Id: I4c895a56bcf571d4276af192aeef87d120143063
Signed-off-by: Oskar Enoksson <enok@lysator.liu.se>
Reviewed-on: http://review.coreboot.org/5186
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: build bot (Jenkins)
This commit is contained in:
Oskar Enoksson 2014-02-11 22:51:03 +01:00 committed by Alexandru Gagniuc
parent d907a3402e
commit aaedecaea4
3 changed files with 40 additions and 0 deletions
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2
src/mainboard/hp/dl145_g1/Kconfig
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@ -12,6 +12,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select BOARD_ROMSIZE_KB_512
select SET_FIDVID
select SET_FIDVID_DEBUG
select RAMINIT_SYSINFO
# select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select QRANK_DIMM_SUPPORT

5
src/mainboard/hp/dl145_g1/acpi_tables.c
View File

@ -21,6 +21,7 @@
#include <cpu/amd/amdk8_sysconf.h>
#include "northbridge/amd/amdk8/acpi.h"
#include "mb_sysconf.h"
#include <cpu/amd/model_fxx_powernow.h>
#define DUMP_ACPI_TABLES 0
@ -163,6 +164,10 @@ unsigned long acpi_fill_madt(unsigned long current)
unsigned long acpi_fill_ssdt_generator(unsigned long current, const char *oem_table_id) {
k8acpi_write_vars();
#if CONFIG_SET_FIDVID
amd_model_fxx_generate_powernow(pm_base + 0x10, 6, 1);
acpigen_write_mainboard_resources("\\_SB.PCI0.MBRS", "_CRS");
#endif
return (unsigned long) (acpigen_get_current());
}

33
src/mainboard/hp/dl145_g1/romstage.c
View File

@ -82,6 +82,9 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "cpu/amd/dualcore/dualcore.c"
#include <spd.h>
#include "cpu/amd/model_fxx/init_cpus.c"
#if CONFIG_SET_FIDVID
#include "cpu/amd/model_fxx/fidvid.c"
#endif
#define RC0 ((1<<1)<<8)
#define RC1 ((1<<2)<<8)
@ -126,6 +129,33 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
#endif
ht_setup_chains_x(sysinfo);
#if CONFIG_SET_FIDVID
/* Check to see if processor is capable of changing FIDVID */
/* otherwise it will throw a GP# when reading FIDVID_STATUS */
struct cpuid_result cpuid1 = cpuid(0x80000007);
if ((cpuid1.edx & 0x6) == 0x6) {
{
/* Read FIDVID_STATUS */
msr_t msr;
msr=rdmsr(0xc0010042);
print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n");
}
enable_fid_change();
enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
init_fidvid_bsp(bsp_apicid);
// show final fid and vid
{
msr_t msr;
msr=rdmsr(0xc0010042);
print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n");
}
} else {
print_debug("Changing FIDVID not supported\n");
}
#endif
needs_reset |= optimize_link_coherent_ht();
needs_reset |= optimize_link_incoherent_ht(sysinfo);
@ -155,6 +185,9 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr);
memreset_setup();
#if CONFIG_SET_FIDVID
init_timer(); // Need to use TMICT to synchronize FID/VID
#endif
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
//dump_pci_devices();