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usbdebug: Remove redundant setup 

Taking ownership is handled with DBGP_OWNER within
usbdebug driver code.

Change-Id: Ia5da10d385cda1b4968f812967ea8a54d7e3c974
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/20824
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Guckian <david.guckian@intel.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Kyösti Mälkki 2017-07-30 13:47:06 +03:00
parent d4ce1ded01
commit ab1d2ac626
3 changed files with 0 additions and 15 deletions
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4
src/soc/intel/broadwell/Kconfig
View File

@ -185,10 +185,6 @@ config EHCI_BAR
hex hex
default 0xd8000000 default 0xd8000000
config EHCI_DEBUG_OFFSET
hex
default 0xa0
config SERIRQ_CONTINUOUS_MODE config SERIRQ_CONTINUOUS_MODE
bool bool
default y default y

7
src/soc/intel/broadwell/usb_debug.c
View File

@ -41,8 +41,6 @@ void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)
void pci_ehci_dbg_enable(pci_devfn_t dev, unsigned long base) void pci_ehci_dbg_enable(pci_devfn_t dev, unsigned long base)
{ {
u32 tmp32;
if (!dev) if (!dev)
return; return;
@ -51,9 +49,4 @@ void pci_ehci_dbg_enable(pci_devfn_t dev, unsigned long base)
/* Enable access to the EHCI memory space registers. */ /* Enable access to the EHCI memory space registers. */
pci_write_config8(dev, PCI_COMMAND, PCI_COMMAND_MEMORY); pci_write_config8(dev, PCI_COMMAND, PCI_COMMAND_MEMORY);
/* Force ownership of hte Debug Port to the EHCI controller. */
tmp32 = read32((void *)(base + CONFIG_EHCI_DEBUG_OFFSET));
tmp32 |= (1 << 30);
write32((void *)(base + CONFIG_EHCI_DEBUG_OFFSET), tmp32);
} }

4
src/southbridge/intel/fsp_rangeley/Kconfig
View File

@ -37,10 +37,6 @@ config EHCI_BAR
hex hex
default 0xfef00000 default 0xfef00000
config EHCI_DEBUG_OFFSET
hex
default 0xa0
config SERIRQ_CONTINUOUS_MODE config SERIRQ_CONTINUOUS_MODE
bool bool
default n default n