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sb/amd/common: Fix some white spaces issues 

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I04951bf142fc4061960f42ad7ae702a70215e658
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65906
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Elyes Haouas 2022-07-16 09:52:39 +02:00 committed by Martin L Roth
parent 4c15211a78
commit ab304bc091
2 changed files with 5 additions and 5 deletions
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8
src/southbridge/amd/common/amd_pci_util.c
View File

@ -39,11 +39,11 @@ void write_pci_int_idx(u8 index, int mode, u8 data)
* given in global variables intr_data and picr_data. * given in global variables intr_data and picr_data.
* These variables are defined in mainboard.c * These variables are defined in mainboard.c
*/ */
void write_pci_int_table (void) void write_pci_int_table(void)
{ {
u8 byte; u8 byte;
if (picr_data_ptr == NULL || intr_data_ptr == NULL){ if (picr_data_ptr == NULL || intr_data_ptr == NULL) {
printk(BIOS_ERR, "Warning: Can't write PCI_INTR 0xC00/0xC01 registers because\n" printk(BIOS_ERR, "Warning: Can't write PCI_INTR 0xC00/0xC01 registers because\n"
"'mainboard_picr_data' or 'mainboard_intr_data' tables are NULL\n"); "'mainboard_picr_data' or 'mainboard_intr_data' tables are NULL\n");
return; return;
@ -54,7 +54,7 @@ void write_pci_int_table (void)
"\tPCI_INTR_INDEX\t\tPCI_INTR_DATA\n"); "\tPCI_INTR_INDEX\t\tPCI_INTR_DATA\n");
for (byte = 0; byte < FCH_INT_TABLE_SIZE; byte++) { for (byte = 0; byte < FCH_INT_TABLE_SIZE; byte++) {
if (intr_types[byte]) { if (intr_types[byte]) {
write_pci_int_idx(byte, 0, (u8) picr_data_ptr[byte]); write_pci_int_idx(byte, 0, (u8)picr_data_ptr[byte]);
printk(BIOS_DEBUG, "\t0x%02X %s\t: 0x%02X\n", printk(BIOS_DEBUG, "\t0x%02X %s\t: 0x%02X\n",
byte, intr_types[byte], read_pci_int_idx(byte, 0)); byte, intr_types[byte], read_pci_int_idx(byte, 0));
} }
@ -65,7 +65,7 @@ void write_pci_int_table (void)
"\tPCI_INTR_INDEX\t\tPCI_INTR_DATA\n"); "\tPCI_INTR_INDEX\t\tPCI_INTR_DATA\n");
for (byte = 0; byte < FCH_INT_TABLE_SIZE; byte++) { for (byte = 0; byte < FCH_INT_TABLE_SIZE; byte++) {
if (intr_types[byte]) { if (intr_types[byte]) {
write_pci_int_idx(byte, 1, (u8) intr_data_ptr[byte]); write_pci_int_idx(byte, 1, (u8)intr_data_ptr[byte]);
printk(BIOS_DEBUG, "\t0x%02X %s\t: 0x%02X\n", printk(BIOS_DEBUG, "\t0x%02X %s\t: 0x%02X\n",
byte, intr_types[byte], read_pci_int_idx(byte, 1)); byte, intr_types[byte], read_pci_int_idx(byte, 1));
} }

2
src/southbridge/amd/common/amd_pci_util.h
View File

@ -23,6 +23,6 @@ extern const u8 *picr_data_ptr;
u8 read_pci_int_idx(u8 index, int mode); u8 read_pci_int_idx(u8 index, int mode);
void write_pci_int_idx(u8 index, int mode, u8 data); void write_pci_int_idx(u8 index, int mode, u8 data);
void write_pci_cfg_irqs(void); void write_pci_cfg_irqs(void);
void write_pci_int_table (void); void write_pci_int_table(void);
#endif /* AMD_PCI_UTIL_H */ #endif /* AMD_PCI_UTIL_H */