Revert "Kconfig: Bring HEAP_SIZE to a common, large value"

This reverts commit 44a48ce7a4.

Reason for revert: It breaks wakeup from suspend on a bunch of boards.

While this approach of eyeballing "correct" values by chipset _should_
be fixed, it should also be accompanied by compile time verification
that the memory map works out.

Since nobody seems to care enough, let's just revert this, instead of
keeping the tree broken for a bunch of configurations.

Change-Id: I3cd73b6ce8b15f06d3480a03ab472dcd444d7ccc
Signed-off-by: Patrick Georgi <patrick@coreboot.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78850
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Patrick Georgi 2023-11-06 17:22:34 +00:00 committed by Felix Singer
parent ab5a9f9378
commit acbc491237
20 changed files with 77 additions and 1 deletions

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@ -751,7 +751,8 @@ config RTC
config HEAP_SIZE
hex
default 0x100000
default 0x100000 if FLATTENED_DEVICE_TREE
default 0x4000
config STACK_SIZE
hex

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@ -35,4 +35,7 @@ config MAX_CPUS
default 32 if SMM_TSEG
default 4
config HEAP_SIZE
default 0x8000
endif

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@ -10,6 +10,9 @@ config BOARD_SPECIFIC_OPTIONS
select FLATTENED_DEVICE_TREE
select SPI_SDCARD
config HEAP_SIZE
default 0x10000
config MAINBOARD_DIR
default "sifive/hifive-unleashed"

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@ -29,4 +29,8 @@ config HW_MEM_HOLE_SIZEK
hex
default 0x200000
config HEAP_SIZE
hex
default 0xc0000
endif # NORTHBRIDGE_AMD_PI

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@ -264,6 +264,10 @@ config S3_VGA_ROM_RUN
bool
default n
config HEAP_SIZE
hex
default 0xc0000
config SERIRQ_CONTINUOUS_MODE
bool
default n

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@ -157,6 +157,10 @@ config S3_VGA_ROM_RUN
bool
default n
config HEAP_SIZE
hex
default 0xc0000
config EHCI_BAR
hex
default 0xfef00000

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@ -30,6 +30,9 @@ config ARCH_ARMV8_EXTENSION
int
default 1
config HEAP_SIZE
default 0x10000
config STACK_SIZE
default 0x2000

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@ -216,6 +216,11 @@ config IED_REGION_SIZE
hex
default 0x400000
config HEAP_SIZE
hex
default 0x80000 if BMP_LOGO
default 0x10000
config GFX_GMA_DEFAULT_MMIO
default 0xaf000000 if MAINBOARD_HAS_EARLY_LIBGFXINIT

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@ -255,6 +255,10 @@ config IFWI_FILE_NAME
help
Name of file to store in the IFWI region.
config HEAP_SIZE
hex
default 0x8000
config MAX_ROOT_PORTS
int
default 6

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@ -177,6 +177,10 @@ config IED_REGION_SIZE
hex
default 0x400000
config HEAP_SIZE
hex
default 0x8000
config NHLT_DMIC_1CH_16B
bool
depends on ACPI_NHLT

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@ -104,6 +104,10 @@ config IED_REGION_SIZE
hex
default 0x0
config HEAP_SIZE
hex
default 0x8000
config MAX_ROOT_PORTS
int
default 7

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@ -106,6 +106,10 @@ config IED_REGION_SIZE
hex
default 0x400000
config HEAP_SIZE
hex
default 0x8000
config MAX_ROOT_PORTS
int
default 8

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@ -198,6 +198,11 @@ config IED_REGION_SIZE
hex
default 0x400000
config HEAP_SIZE
hex
default 0x80000 if BMP_LOGO
default 0x10000
# Intel recommends reserving the PCIe TBT root port resources as below:
# - 42 buses
# - 194 MiB Non-prefetchable memory

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@ -151,6 +151,10 @@ config EXCLUDE_NATIVE_SD_INTERFACE
help
If you set this option to n, will not use native SD controller.
config HEAP_SIZE
hex
default 0x80000
config IED_REGION_SIZE
hex
default 0x400000

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@ -152,6 +152,10 @@ config IED_REGION_SIZE
config INTEL_TME
default n
config HEAP_SIZE
hex
default 0x10000
config MAX_ROOT_PORTS
int
default 24 if SOC_INTEL_TIGERLAKE_PCH_H

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@ -91,6 +91,10 @@ config ECAM_MMCONF_BASE_ADDRESS
config ECAM_MMCONF_BUS_NUMBER
default 256
config HEAP_SIZE
hex
default 0x80000
config HPET_MIN_TICKS
hex
default 0x80

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@ -71,6 +71,10 @@ config CPU_MICROCODE_CBFS_LEN
hex
default 0x7C00
config HEAP_SIZE
hex
default 0x80000
config STACK_SIZE
hex
default 0x4000

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@ -55,6 +55,10 @@ config CPU_MICROCODE_CBFS_LEN
hex
default 0x7C00
config HEAP_SIZE
hex
default 0x80000
config IED_REGION_SIZE
hex
default 0x400000

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@ -79,6 +79,10 @@ config CPU_MICROCODE_CBFS_LEN
hex
default 0x8c00
config HEAP_SIZE
hex
default 0x80000
config STACK_SIZE
hex
default 0x4000

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@ -57,4 +57,8 @@ config SBL_UTIL_PATH
help
Path for utils to combine SBL_ELF and bootblock
config HEAP_SIZE
hex
default 0x8000
endif