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soc/mediatek/mt8195: Add early init support 

Add early init support for MT8195 platform.

TEST=Build pass and boot up to kernel successfully via SSD on Dojo
board, here is the SSD information in boot log:
 == NVME IDENTIFY CONTROLLER DATA ==
    PCI VID   : 0x15b7
    PCI SSVID : 0x15b7
    SN        : 21517J440114
    MN        : WDC PC SN530 SDBPTPZ-256G-1006
    RAB       : 0x4
    AERL      : 0x7
    SQES      : 0x66
    CQES      : 0x44
    NN        : 0x1
Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006

BUG=b:178565024
BRANCH=cherry

Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Change-Id: I4eb7da53ff76c385cab18bbf84970e96b61662ac
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63020
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This commit is contained in:
Jianjun Wang 2022-03-23 15:28:10 +08:00 committed by Paul Fagerburg
parent 41faa22c53
commit acf16bf4f6
3 changed files with 8 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/soc/mediatek/mt8195/Makefile.inc
View File

@ -2,6 +2,7 @@ ifeq ($(CONFIG_SOC_MEDIATEK_MT8195),y)
bootblock-y += ../common/auxadc.c bootblock-y += ../common/auxadc.c
bootblock-y += bootblock.c bootblock-y += bootblock.c
bootblock-y += ../common/early_init.c
bootblock-y += ../common/eint_event.c bootblock-y += ../common/eint_event.c
bootblock-y += ../common/flash_controller.c bootblock-y += ../common/flash_controller.c
bootblock-y += ../common/gpio.c gpio.c bootblock-y += ../common/gpio.c gpio.c
@ -53,6 +54,7 @@ romstage-y += mt6360.c
romstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c romstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c
ramstage-y += ../common/auxadc.c ramstage-y += ../common/auxadc.c
ramstage-y += ../common/early_init.c
ramstage-y += ../common/ddp.c ddp.c ramstage-y += ../common/ddp.c ddp.c
ramstage-y += devapc.c ramstage-y += devapc.c
ramstage-y += ../common/dfd.c ramstage-y += ../common/dfd.c

2
src/soc/mediatek/mt8195/bootblock.c
View File

@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <bootblock_common.h> #include <bootblock_common.h>
#include <soc/early_init.h>
#include <soc/eint_event.h> #include <soc/eint_event.h>
#include <soc/mmu_operations.h> #include <soc/mmu_operations.h>
#include <soc/pll.h> #include <soc/pll.h>
@ -14,4 +15,5 @@ void bootblock_soc_init(void)
mtk_wdt_init(); mtk_wdt_init();
mt_pll_init(); mt_pll_init();
unmask_eint_event_mask(); unmask_eint_event_mask();
early_init_clear();
} }

4
src/soc/mediatek/mt8195/include/soc/memlayout.ld
View File

@ -19,6 +19,9 @@
_ = ASSERT(size % 4K == 0, \ _ = ASSERT(size % 4K == 0, \
"DRAM DMA buffer should be multiple of smallest page size (4K)!"); "DRAM DMA buffer should be multiple of smallest page size (4K)!");
#define EARLY_INIT(addr, size) \
REGION(early_init_data, addr, size, 4)
SECTIONS SECTIONS
{ {
SRAM_START(0x00100000) SRAM_START(0x00100000)
@ -26,6 +29,7 @@ SECTIONS
TPM_TCPA_LOG(0x00103000, 2K) TPM_TCPA_LOG(0x00103000, 2K)
FMAP_CACHE(0x00103800, 2K) FMAP_CACHE(0x00103800, 2K)
WATCHDOG_TOMBSTONE(0x00104000, 4) WATCHDOG_TOMBSTONE(0x00104000, 4)
EARLY_INIT(0x00104010, 128)
CBFS_MCACHE(0x00107c00, 8K) CBFS_MCACHE(0x00107c00, 8K)
TIMESTAMP(0x00109c00, 1K) TIMESTAMP(0x00109c00, 1K)
STACK(0x0010a000, 12K) STACK(0x0010a000, 12K)