src/mainboard: change "unsigned" to "unsigned int"

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I46d131f76ec930d2ef0f74e6eaabae067df10754
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36330
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Martin Roth 2019-10-23 21:41:43 -06:00 committed by Martin Roth
parent 38ddbfb325
commit ad0f485361
58 changed files with 97 additions and 97 deletions

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@ -22,7 +22,7 @@
#include <southbridge/amd/pi/hudson/hudson.h>
#include <southbridge/amd/common/amd_pci_util.h>
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned length)
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned int length)
{
mc->mpc_length += length;
mc->mpc_entry_count++;

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@ -39,7 +39,7 @@ u8 intr_data[0x54] = {
0x10,0x11,0x12,0x13
};
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned length)
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned int length)
{
mc->mpc_length += length;
mc->mpc_entry_count++;

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@ -39,7 +39,7 @@ u8 intr_data[0x54] = {
0x10,0x11,0x12,0x13
};
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned length)
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned int length)
{
mc->mpc_length += length;
mc->mpc_entry_count++;

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@ -39,7 +39,7 @@ u8 intr_data[0x54] = {
0x10,0x11,0x12,0x13
};
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned length)
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned int length)
{
mc->mpc_length += length;
mc->mpc_entry_count++;

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@ -39,7 +39,7 @@ u8 intr_data[0x54] = {
0x10,0x11,0x12,0x13
};
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned length)
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned int length)
{
mc->mpc_length += length;
mc->mpc_entry_count++;

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@ -43,7 +43,7 @@ u8 intr_data[] = {
0x10,0x11,0x12,0x13
};
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned length)
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned int length)
{
mc->mpc_length += length;
mc->mpc_entry_count++;
@ -64,9 +64,9 @@ static void *smp_write_config_table(void *v)
struct mp_config_table *mc;
int bus_isa;
int boot_apic_id;
unsigned apic_version;
unsigned cpu_features;
unsigned cpu_feature_flags;
unsigned int apic_version;
unsigned int cpu_features;
unsigned int cpu_feature_flags;
struct cpuid_result result;
unsigned long cpu_flag;

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@ -40,7 +40,7 @@ u8 intr_data[0x54] = {
0x10,0x11,0x12,0x13
};
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned length)
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned int length)
{
mc->mpc_length += length;
mc->mpc_entry_count++;

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@ -39,7 +39,7 @@ u8 intr_data[0x54] = {
0x10,0x11,0x12,0x13
};
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned length)
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned int length)
{
mc->mpc_length += length;
mc->mpc_entry_count++;

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@ -32,11 +32,11 @@
*/
/* busnum is default */
unsigned char bus_ck804[6];
unsigned apicid_ck804;
unsigned int apicid_ck804;
void get_bus_conf(void)
{
unsigned apicid_base, sbdn;
unsigned int apicid_base, sbdn;
struct device *dev;
int i;

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@ -64,7 +64,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
{
struct irq_routing_table *pirq;
struct irq_info *pirq_info;
unsigned slot_num, sbdn;
unsigned int slot_num, sbdn;
uint8_t *v, sum = 0;
int i;

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@ -29,12 +29,12 @@
#include <cpu/amd/amdfam10_sysconf.h>
extern unsigned char bus_ck804[6];
extern unsigned apicid_ck804;
extern unsigned int apicid_ck804;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned sbdn;
unsigned int sbdn;
int bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);

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@ -65,7 +65,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
* @param[in] bus target bus number
* @return southbridge device number
*/
unsigned int get_sbdn(unsigned bus)
unsigned int get_sbdn(unsigned int bus)
{
pci_devfn_t dev;
@ -114,7 +114,7 @@ static const unsigned int ctrl_conf_enable_msi_mapping[] = {
static void ck804_control(const unsigned int *values, u32 size,
uint8_t bus_unit_id)
{
unsigned busn[4], io_base[4];
unsigned int busn[4], io_base[4];
int i, ck804_num = 0;
for (i = 0; i < 4; i++) {

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@ -39,7 +39,7 @@ u8 intr_data[0x54] = {
0x10,0x11,0x12,0x13
};
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned length)
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned int length)
{
mc->mpc_length += length;
mc->mpc_entry_count++;

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@ -39,7 +39,7 @@ u8 intr_data[0x54] = {
0x10,0x11,0x12,0x13
};
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned length)
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned int length)
{
mc->mpc_length += length;
mc->mpc_entry_count++;

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@ -330,9 +330,9 @@ static void mainboard_enable(struct device *dev)
mmu_config_range(DRAM_END, 4096 - DRAM_END, DCACHE_OFF);
dcache_mmu_enable();
const unsigned epll_hz = 192000000;
const unsigned sample_rate = 48000;
const unsigned lr_frame_size = 256;
const unsigned int epll_hz = 192000000;
const unsigned int sample_rate = 48000;
const unsigned int lr_frame_size = 256;
clock_epll_set_rate(epll_hz);
clock_select_i2s_clk_source();
clock_set_i2s_clk_prescaler(epll_hz, sample_rate * lr_frame_size);

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@ -34,7 +34,7 @@ struct max77620_init_reg {
u8 delay;
};
static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int delay)
static void pmic_write_reg(unsigned int bus, uint8_t reg, uint8_t val, int delay)
{
if (i2c_writeb(bus, MAX77620_I2C_ADDR, reg, val)) {
printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n",
@ -47,7 +47,7 @@ static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int delay)
}
}
void pmic_init(unsigned bus)
void pmic_init(unsigned int bus)
{
/* Setup/Enable GPIO5 - VDD_CPU_REG_EN */
pmic_write_reg(bus, MAX77620_GPIO5_REG, 0x09, 1);

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@ -65,6 +65,6 @@
#define MAX77620_CID4_REG 0x5C
#define MAX77620_CID5_REG 0x5D
void pmic_init(unsigned bus);
void pmic_init(unsigned int bus);
#endif /* __MAINBOARD_GOOGLE_FOSTER_PMIC_H__ */

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@ -20,7 +20,7 @@
#include <types.h>
#include <boardid.h>
void ipq_configure_gpio(const gpio_func_data_t *gpio, unsigned count)
void ipq_configure_gpio(const gpio_func_data_t *gpio, unsigned int count)
{
int i;

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@ -55,7 +55,7 @@ static struct as3722_init_reg init_list[] = {
{AS3722_LDO11, 0x00, 1},
};
static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int do_delay)
static void pmic_write_reg(unsigned int bus, uint8_t reg, uint8_t val, int do_delay)
{
if (i2c_writeb(bus, AS3722_I2C_ADDR, reg, val)) {
printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n",
@ -68,7 +68,7 @@ static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int do_delay)
}
}
static void pmic_slam_defaults(unsigned bus)
static void pmic_slam_defaults(unsigned int bus)
{
int i;
for (i = 0; i < ARRAY_SIZE(init_list); i++) {
@ -77,7 +77,7 @@ static void pmic_slam_defaults(unsigned bus)
}
}
void pmic_init(unsigned bus)
void pmic_init(unsigned int bus)
{
/*
* Don't need to set up VDD_CORE - already done - by OTP

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@ -39,6 +39,6 @@ enum {
AS3722_LDO11,
};
void pmic_init(unsigned bus);
void pmic_init(unsigned int bus);
#endif /* __MAINBOARD_GOOGLE_NYAN_PMIC_H__ */

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@ -55,7 +55,7 @@ static struct as3722_init_reg init_list[] = {
{AS3722_LDO11, 0x00, 1},
};
static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int do_delay)
static void pmic_write_reg(unsigned int bus, uint8_t reg, uint8_t val, int do_delay)
{
if (i2c_writeb(bus, AS3722_I2C_ADDR, reg, val)) {
printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n",
@ -68,7 +68,7 @@ static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int do_delay)
}
}
static void pmic_slam_defaults(unsigned bus)
static void pmic_slam_defaults(unsigned int bus)
{
int i;
@ -78,7 +78,7 @@ static void pmic_slam_defaults(unsigned bus)
}
}
void pmic_init(unsigned bus)
void pmic_init(unsigned int bus)
{
/*
* Don't need to set up VDD_CORE - already done - by OTP

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@ -39,6 +39,6 @@ enum {
AS3722_LDO11,
};
void pmic_init(unsigned bus);
void pmic_init(unsigned int bus);
#endif /* __MAINBOARD_GOOGLE_NYAN_BIG_PMIC_H__ */

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@ -55,7 +55,7 @@ static struct as3722_init_reg init_list[] = {
{AS3722_LDO11, 0x00, 1},
};
static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int do_delay)
static void pmic_write_reg(unsigned int bus, uint8_t reg, uint8_t val, int do_delay)
{
if (i2c_writeb(bus, AS3722_I2C_ADDR, reg, val)) {
printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n",
@ -68,7 +68,7 @@ static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int do_delay)
}
}
static void pmic_slam_defaults(unsigned bus)
static void pmic_slam_defaults(unsigned int bus)
{
int i;
@ -78,7 +78,7 @@ static void pmic_slam_defaults(unsigned bus)
}
}
void pmic_init(unsigned bus)
void pmic_init(unsigned int bus)
{
/*
* Don't need to set up VDD_CORE - already done - by OTP

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@ -39,6 +39,6 @@ enum {
AS3722_LDO11,
};
void pmic_init(unsigned bus);
void pmic_init(unsigned int bus);
#endif /* __MAINBOARD_GOOGLE_NYAN_BLAZE_PMIC_H__ */

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@ -465,9 +465,9 @@ static void mainboard_enable(struct device *dev)
mmu_config_range((uintptr_t)_dma_coherent/MiB,
REGION_SIZE(dma_coherent)/MiB, DCACHE_OFF);
const unsigned epll_hz = 192000000;
const unsigned sample_rate = 48000;
const unsigned lr_frame_size = 256;
const unsigned int epll_hz = 192000000;
const unsigned int sample_rate = 48000;
const unsigned int lr_frame_size = 256;
clock_epll_set_rate(epll_hz);
clock_select_i2s_clk_source();
clock_set_i2s_clk_prescaler(epll_hz, sample_rate * lr_frame_size);

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@ -36,7 +36,7 @@ struct max77620_init_reg {
u8 delay;
};
static void pmic_write_reg(unsigned bus, uint8_t chip, uint8_t reg, uint8_t val,
static void pmic_write_reg(unsigned int bus, uint8_t chip, uint8_t reg, uint8_t val,
int delay)
{
if (i2c_writeb(bus, chip, reg, val)) {
@ -50,19 +50,19 @@ static void pmic_write_reg(unsigned bus, uint8_t chip, uint8_t reg, uint8_t val,
}
}
void pmic_write_reg_77620(unsigned bus, uint8_t reg, uint8_t val,
void pmic_write_reg_77620(unsigned int bus, uint8_t reg, uint8_t val,
int delay)
{
pmic_write_reg(bus, MAX77620_I2C_ADDR, reg, val, delay);
}
static inline void pmic_write_reg_77621(unsigned bus, uint8_t reg, uint8_t val,
static inline void pmic_write_reg_77621(unsigned int bus, uint8_t reg, uint8_t val,
int delay)
{
pmic_write_reg(bus, MAX77621_CPU_I2C_ADDR, reg, val, delay);
}
void pmic_init(unsigned bus)
void pmic_init(unsigned int bus)
{
/* MAX77620: Set SD0 to 1.0V - VDD_CORE */
pmic_write_reg_77620(bus, MAX77620_SD0_REG, 0x20, 1);

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@ -73,8 +73,8 @@
#define MAX77621_CONTROL1_REG 0x02
#define MAX77621_CONTROL2_REG 0x03
void pmic_init(unsigned bus);
void pmic_write_reg_77620(unsigned bus, uint8_t reg, uint8_t val,
void pmic_init(unsigned int bus);
void pmic_write_reg_77620(unsigned int bus, uint8_t reg, uint8_t val,
int delay);
#endif /* __MAINBOARD_GOOGLE_FOSTER_PMIC_H__ */

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@ -21,7 +21,7 @@
#include <types.h>
#include <boardid.h>
void ipq_configure_gpio(const gpio_func_data_t *gpio, unsigned count)
void ipq_configure_gpio(const gpio_func_data_t *gpio, unsigned int count)
{
int i;

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@ -39,7 +39,7 @@ u8 intr_data[0x54] = {
0x10,0x11,0x12,0x13
};
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned length)
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned int length)
{
mc->mpc_length += length;
mc->mpc_entry_count++;

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@ -18,13 +18,13 @@
#define SCH4307_CONFIG_PORT 0x162e
static inline void shc4307_enter_ext_func_mode(pnp_devfn_t dev)
{
unsigned port = dev >> 8;
unsigned int port = dev >> 8;
outb(0x55, port);
}
static inline void shc4307_exit_ext_func_mode(pnp_devfn_t dev)
{
unsigned port = dev >> 8;
unsigned int port = dev >> 8;
outb(0xaa, port);
}

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@ -33,7 +33,7 @@ struct mb_sysconf_t mb_sysconf;
void get_bus_conf(void)
{
unsigned apicid_base;
unsigned int apicid_base;
struct device *dev;
int i;

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@ -29,9 +29,9 @@ struct mb_sysconf_t {
unsigned char bus_bcm5785_0;
unsigned char bus_bcm5785_1;
unsigned char bus_bcm5785_1_1;
unsigned apicid_bcm5785[3];
unsigned int apicid_bcm5785[3];
unsigned sbdn2;
unsigned int sbdn2;
};
#endif

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@ -39,7 +39,7 @@ u8 intr_data[0x54] = {
0x10,0x11,0x12,0x13
};
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned length)
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned int length)
{
mc->mpc_length += length;
mc->mpc_entry_count++;

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@ -165,7 +165,7 @@ static void mainboard_enable(struct device *dev)
mainboard_interrupt_handlers(0x15, &int15_handler);
#endif
unsigned disable = 0;
unsigned int disable = 0;
if ((get_option(&disable, "ethernet1") == CB_SUCCESS) && disable) {
struct device *nic = pcidev_on_root(0x1c, 2);
if (nic) {

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@ -39,7 +39,7 @@ u8 intr_data[0x54] = {
0x10,0x11,0x12,0x13
};
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned length)
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned int length)
{
mc->mpc_length += length;
mc->mpc_entry_count++;

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@ -39,7 +39,7 @@ u8 intr_data[0x54] = {
0x10,0x11,0x12,0x13
};
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned length)
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned int length)
{
mc->mpc_length += length;
mc->mpc_entry_count++;

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@ -34,7 +34,7 @@ unsigned long acpi_fill_madt(unsigned long current)
//extern unsigned char bus_mcp55[8];
//extern unsigned apicid_mcp55;
unsigned sbdn;
unsigned int sbdn;
struct resource *res;
struct device *dev;

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@ -32,7 +32,7 @@ struct mb_sysconf_t mb_sysconf;
void get_bus_conf(void)
{
unsigned apicid_base;
unsigned int apicid_base;
struct mb_sysconf_t *m;
struct device *dev;

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@ -49,10 +49,10 @@ unsigned long write_pirq_routing_table(unsigned long addr)
struct irq_routing_table *pirq;
struct irq_info *pirq_info;
unsigned slot_num;
unsigned int slot_num;
uint8_t *v;
struct mb_sysconf_t *m;
unsigned sbdn;
unsigned int sbdn;
uint8_t sum = 0;
int i;
@ -96,8 +96,8 @@ unsigned long write_pirq_routing_table(unsigned long addr)
for (i = 1; i < sysconf.hc_possible_num; i++) {
if (!(sysconf.pci1234[i] & 0x1))
continue;
unsigned busn = (sysconf.pci1234[i] >> 12) & 0xff;
unsigned devn = sysconf.hcdn[i] & 0xff;
unsigned int busn = (sysconf.pci1234[i] >> 12) & 0xff;
unsigned int devn = sysconf.hcdn[i] & 0xff;
write_pirq_info(pirq_info, busn, PCI_DEVFN(devn, 0), 0x1, 0xdef8,
0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);

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@ -20,7 +20,7 @@
struct mb_sysconf_t {
unsigned char bus_mcp55[8]; //1
unsigned apicid_mcp55;
unsigned int apicid_mcp55;
};
#endif

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@ -26,7 +26,7 @@ static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
struct mb_sysconf_t *m;
unsigned sbdn;
unsigned int sbdn;
int i, j, bus_isa;

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@ -52,7 +52,7 @@ inline int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address);
}
unsigned get_sbdn(unsigned bus)
unsigned int get_sbdn(unsigned int bus)
{
pci_devfn_t dev;

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@ -25,7 +25,7 @@ static void pci7xx1_enable(struct device *const dev)
{
printk(BIOS_DEBUG, "%s: TI PCI7xx1 media controller\n", __func__);
if (PCI_FUNC(dev->path.pci.devfn) == 0) {
const unsigned slot = PCI_SLOT(dev->path.pci.devfn);
const unsigned int slot = PCI_SLOT(dev->path.pci.devfn);
int fn;

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@ -33,7 +33,7 @@ struct mb_sysconf_t mb_sysconf;
void get_bus_conf(void)
{
unsigned apicid_base;
unsigned int apicid_base;
struct mb_sysconf_t *m;
struct device *dev;

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@ -49,10 +49,10 @@ unsigned long write_pirq_routing_table(unsigned long addr)
struct irq_routing_table *pirq;
struct irq_info *pirq_info;
unsigned slot_num;
unsigned int slot_num;
uint8_t *v;
struct mb_sysconf_t *m;
unsigned sbdn;
unsigned int sbdn;
uint8_t sum = 0;
int i;
@ -96,8 +96,8 @@ unsigned long write_pirq_routing_table(unsigned long addr)
for (i = 1; i < sysconf.hc_possible_num; i++) {
if (!(sysconf.pci1234[i] & 0x1))
continue;
unsigned busn = (sysconf.pci1234[i] >> 12) & 0xff;
unsigned devn = sysconf.hcdn[i] & 0xff;
unsigned int busn = (sysconf.pci1234[i] >> 12) & 0xff;
unsigned int devn = sysconf.hcdn[i] & 0xff;
write_pirq_info(pirq_info, busn, PCI_DEVFN(devn, 0), 0x1, 0xdef8,
0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);

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@ -20,7 +20,7 @@
struct mb_sysconf_t {
unsigned char bus_mcp55[8]; //1
unsigned apicid_mcp55;
unsigned int apicid_mcp55;
};
#endif

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@ -26,7 +26,7 @@ static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
struct mb_sysconf_t *m;
unsigned sbdn;
unsigned int sbdn;
int i, j, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);

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@ -55,7 +55,7 @@ inline int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address);
}
unsigned get_sbdn(unsigned bus)
unsigned int get_sbdn(unsigned int bus)
{
pci_devfn_t dev;

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@ -30,12 +30,12 @@
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
struct mb_sysconf_t mb_sysconf;
unsigned sbdn3;
unsigned int sbdn3;
void get_bus_conf(void)
{
unsigned apicid_base;
unsigned int apicid_base;
struct mb_sysconf_t *m;
struct device *dev;

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@ -49,10 +49,10 @@ unsigned long write_pirq_routing_table(unsigned long addr)
struct irq_routing_table *pirq;
struct irq_info *pirq_info;
unsigned slot_num;
unsigned int slot_num;
uint8_t *v;
struct mb_sysconf_t *m;
unsigned sbdn;
unsigned int sbdn;
uint8_t sum = 0;
int i;
@ -96,8 +96,8 @@ unsigned long write_pirq_routing_table(unsigned long addr)
for (i = 1; i < sysconf.hc_possible_num; i++) {
if (!(sysconf.pci1234[i] & 0x1))
continue;
unsigned busn = (sysconf.pci1234[i] >> 12) & 0xff;
unsigned devn = sysconf.hcdn[i] & 0xff;
unsigned int busn = (sysconf.pci1234[i] >> 12) & 0xff;
unsigned int devn = sysconf.hcdn[i] & 0xff;
write_pirq_info(pirq_info, busn, PCI_DEVFN(devn, 0), 0x1, 0x4ca0,
0x2, 0x4ca0, 0x3, 0x4ca0, 0x4, 0x4ca0, 0, 0);

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@ -20,13 +20,13 @@
struct mb_sysconf_t {
unsigned char bus_mcp55[8]; //1
unsigned apicid_mcp55;
unsigned int apicid_mcp55;
unsigned char bus_8132_0; //7
unsigned char bus_8132_1; //8
unsigned char bus_8132_2; //9
unsigned apicid_8132_1;
unsigned apicid_8132_2;
unsigned int apicid_8132_1;
unsigned int apicid_8132_2;
};
#endif

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@ -22,13 +22,13 @@
#include <cpu/amd/amdfam10_sysconf.h>
#include "mb_sysconf.h"
extern unsigned sbdn3;
extern unsigned int sbdn3;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
struct mb_sysconf_t *m;
unsigned sbdn;
unsigned int sbdn;
int i, j, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);

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@ -63,7 +63,7 @@ inline int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address);
}
unsigned get_sbdn(unsigned bus)
unsigned int get_sbdn(unsigned int bus)
{
pci_devfn_t dev;

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@ -32,7 +32,7 @@ struct mb_sysconf_t mb_sysconf;
void get_bus_conf(void)
{
unsigned apicid_base;
unsigned int apicid_base;
struct mb_sysconf_t *m;
struct device *dev;

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@ -49,10 +49,10 @@ unsigned long write_pirq_routing_table(unsigned long addr)
struct irq_routing_table *pirq;
struct irq_info *pirq_info;
unsigned slot_num;
unsigned int slot_num;
uint8_t *v;
struct mb_sysconf_t *m;
unsigned sbdn;
unsigned int sbdn;
uint8_t sum = 0;
int i;
@ -96,8 +96,8 @@ unsigned long write_pirq_routing_table(unsigned long addr)
for (i = 1; i < sysconf.hc_possible_num; i++) {
if (!(sysconf.pci1234[i] & 0x1))
continue;
unsigned busn = (sysconf.pci1234[i] >> 12) & 0xff;
unsigned devn = sysconf.hcdn[i] & 0xff;
unsigned int busn = (sysconf.pci1234[i] >> 12) & 0xff;
unsigned int devn = sysconf.hcdn[i] & 0xff;
write_pirq_info(pirq_info, busn, PCI_DEVFN(devn, 0), 0x1, 0xdef8,
0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);

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@ -20,7 +20,7 @@
struct mb_sysconf_t {
unsigned char bus_mcp55[8]; //1
unsigned apicid_mcp55;
unsigned int apicid_mcp55;
};
#endif

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@ -26,7 +26,7 @@ static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
struct mb_sysconf_t *m;
unsigned sbdn;
unsigned int sbdn;
int i, j, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);

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@ -62,7 +62,7 @@ inline int spd_read_byte(unsigned int device, unsigned int address)
#include <southbridge/nvidia/mcp55/early_setup_ss.h>
#include "southbridge/nvidia/mcp55/early_setup_car.c"
unsigned get_sbdn(unsigned bus)
unsigned int get_sbdn(unsigned int bus)
{
pci_devfn_t dev;